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EPVP6200 Datasheet(PDF) 40 Page - ELAN Microelectronics Corp

Part No. EPVP6200
Description  VFD Controller
Download  57 Pages
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Maker  EMC [ELAN Microelectronics Corp]
Homepage  http://www.emc.com.tw
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 40 page
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ePVP6200
VFD Controller
34 of 57
11.18.2004 (V1.53)
This specification is subject to change without further notice.
8
Segment Data Buffers
The ePVP6200 chip provides a total of 256 bytes data RAM. On the other hand, display
Segment Data Buffers can be stored either in the data RAM of 256 bytes sizes (00h~40h) or in
the common registers of Bank 2 and Bank 3 (20h~3Fh).
a) Data RAM Address
00h~38h
57X8 Segment Data Buffers
39h~3Eh
6X8 Key Scanning Data Buffers
3Fh
SW data register
40h
LED data register
b) Common Registers Address
20
Bank0~Bank3
:
Common registers
3F
(32x8 for each bank)
These buffers store display RAM. The display RAM stores the data transmitted from an external device to the
ePVP6200 through the serial interface and is assigned addresses as follows, in units of 8 bits:
X X H
X X H
LU
Lower 4 bits
Higher 4 bits
b0
b3
b4
b7
Only the lower 4 bits of the addresses assigned to SEG17 through SEG20 are valid and the
higher 4 bits are ignored.
c) Display Memory Addresses:
Seg1
Seg4
Seg8
Seg12
Seg16
Seg20
00 HL
00 HU
01 HL
01 HU
02 HL
DIG1
03 HL
03 HU
04 HL
04 HU
05 HL
DIG2
06 HL
06 HU
07 HL
07 HU
08 HL
DIG3
09 HL
09 HU
0A HL
0A HU
0B HL
DIG4
0C HL
0C HU
0D HL
0D HU
0E HL
DIG5
0F HL
0F HU
10 HL
10 HU
11 HL
DIG6
12 HL
12 HU
13 HL
13 HU
14 HL
DIG7
15 HL
15 HU
16 HL
16 HU
17 HL
DIG8
18 HL
18 HU
19 HL
19 HU
1A HL
DIG9
1B HL
1B HU
1C HL
1C HU
1D HL
DIG10
1E HL
1E HU
1F HL
1F HU
20 HL
DIG11
21 HL
21 HU
22 HL
22 HU
23 HL
DIG12
24 HL
24 HU
25 HL
25 HU
26 HL
DIG13




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