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EPVP6200 Datasheet(PDF) 38 Page - ELAN Microelectronics Corp

Part No. EPVP6200
Description  VFD Controller
Download  57 Pages
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Maker  EMC [ELAN Microelectronics Corp]
Homepage  http://www.emc.com.tw
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 38 page
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ePVP6200
VFD Controller
32 of 57
11.18.2004 (V1.53)
This specification is subject to change without further notice.
Instruction Binary
HEX
Mnemonic
Operation
Status
Affected
Instruction
Cycle
0 0000 0000 0000
0000
NOP
No Operation
None
1
0 0000 0000 0001
0001
DAA
Decimal Adjust A
C
1
0 0000 0000 0010
0002
CONTW
A
→ CONT
None
1
0 0000 0000 0011
0003
SLEP
0
→ WDT, Stop oscillator
T,P
1
0 0000 0000 0100
0004
WDTC
0
→ WDT
T,P
1
0 0000 0000 rrrr
000r
IOW R
A
→ IOCR
None
1
0 0000 0001 0000
0010
ENI
Enable Interrupt
None
1
0 0000 0001 0001
0011
DISI
Disable Interrupt
None
1
0 0000 0001 0010
0012
RET
[Top of Stack]
→ PC
None
2
0 0000 0001 0011
0013
RETI
[Top of Stack]
→ PC
Enable Interrupt
None
2
0 0000 0001 0100
0014
CONTR
CONT
→ A
None
1
0 0000 0001 rrrr
001r
IOR R
IOCR
→ A
None
1
0 0000 0010 0000
0020
TBL
R2+A
→ R2 bits 9,10 do not clear Z,C,DC
2
0 0000 01rr rrrr
00rr
MOV R,A
A
→ R
None
1
0 0000 1000 0000
0080
CLRA
0
→ A
Z
1
0 0000 11rr rrrr
00rr
CLR R
0
→ R
Z
1
0 0001 00rr rrrr
01rr
SUB A,R
R-A
→ A
Z,C,DC
1
0 0001 01rr rrrr
01rr
SUB R,A
R-A
→ R
Z,C,DC
1
0 0001 10rr rrrr
01rr
DECA R
R-1
→ A
Z
1
0 0001 11rr rrrr
01rr
DEC R
R-1
→ R
Z
1
0 0010 00rr rrrr
02rr
OR A,R
A
∨ R → A
Z
1
0 0010 01rr rrrr
02rr
OR R,A
A
∨ R → R
Z
1
0 0010 10rr rrrr
02rr
AND A,R
A & R
→ A
Z
1
0 0010 11rr rrrr
02rr
AND R,A
A & R
→ R
Z
1
0 0011 00rr rrrr
03rr
XOR A,R
A
⊕ R → A
Z
1
0 0011 01rr rrrr
03rr
XOR R,A
A
⊕ R → R
Z
1
0 0011 10rr rrrr
03rr
ADD A,R
A + R
→ A
Z,C,DC
1
0 0011 11rr rrrr
03rr
ADD R,A
A + R
→ R
Z,C,DC
1
0 0100 00rr rrrr
04rr
MOV A,R
R
→ A
Z
1
0 0100 01rr rrrr
04rr
MOV R,R
R
→ R
Z
1
0 0100 10rr rrrr
04rr
COMA R
/R
→ A
Z
1
0 0100 11rr rrrr
04rr
COM R
/R
→ R
Z
1
0 0101 00rr rrrr
05rr
INCA R
R+1
→ A
Z
1
0 0101 01rr rrrr
05rr
INC R
R+1
→ R
Z
1
0 0101 10rr rrrr
05rr
DJZA R
R-1
→ A, skip if zero
None
2 if skip
0 0101 11rr rrrr
05rr
DJZ R
R-1
→ R, skip if zero
None
2 if skip
0 0110 00rr rrrr
06rr
RRCA R
R(n)
→ A(n-1)
R(0)
→ C, C → A(7)
C
1




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