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NM27P512NE200 Datasheet(PDF) 2 Page - National Semiconductor (TI) |
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NM27P512NE200 Datasheet(HTML) 2 Page - National Semiconductor (TI) |
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2 / 12 page  Connection Diagrams 27C080 27C040 27C020 27C010 27C256 A19 XXVPP XXVPP XXVPP A16 A16 A16 A16 A15 A15 A15 A15 VPP A12 A12 A12 A12 A12 A7 A7 A7 A7 A7 A6 A6 A6 A6 A6 A5 A5 A5 A5 A5 A4 A4 A4 A4 A4 A3 A3 A3 A3 A3 A2 A2 A2 A2 A2 A1 A1 A1 A1 A1 A0 A0 A0 A0 A0 O0 O0 O0 O0 O0 O1 O1 O1 O1 O1 O2 O2 O2 O2 O2 GND GND GND GND GND DIP NM27P512 TLD11365 – 2 27C256 27C010 27C020 27C040 27C080 VCC VCC VCC VCC XXPGM XXPGM A18 A18 VCC XX A17 A17 A17 A14 A14 A14 A14 A14 A13 A13 A13 A13 A13 A8 A8 A8 A8 A8 A9 A9 A9 A9 A9 A11 A11 A11 A11 A11 OE OE OE OE OE VPP A10 A10 A10 A10 A10 CE PGM CE CE CE PGM CE PGM O7 O7 O7 O7 O7 O6 O6 O6 O6 O6 O5 O5 O5 O5 O5 O4 O4 O4 O4 O4 O3 O3 O3 O3 O3 Note Compatible EPROM pin configurations are shown in the blocks adjacent to the NM27P512 pins Commercial Temp Range (0 Cto a70 C) ParameterOrder Number Access Time (ns) NM27P512 Q N V 120 120 NM27P512 Q N V 150 150 NM27P512 Q N V 200 200 Military Temp Range (b55 Cto a125 C) ParameterOrder Number Access Time (ns) NM27P512 QM 200 200 Extended Temp Range (b40 Cto a85 C) ParameterOrder Number Access Time (ns) NM27P512 QE NE VE 120 120 NM27P512 QE NE VE 150 150 NM27P512 QE NE VE 200 200 Note Surface mount PLCC package available for commercial and extended temperature ranges only All versions are guaranteed to function for slower speeds Package Types NM27P512 Q N V XXX Q e Quartz-Windowed Ceramic DIP Package N e Plastic OTP DIP Package V e PLCC Package All packages conform to the JEDEC standard Pin Names A0 – A15 Addresses CE Chip Enable OE Output Enable O0 – O7 Outputs PGM Program XX Don’t Care (During Read) PLCC TLD11365 – 3 2 |
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