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K4D26323QG-GC2A Datasheet(PDF) 10 Page - Samsung semiconductor |
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K4D26323QG-GC2A Datasheet(HTML) 10 Page - Samsung semiconductor |
10 / 18 page 128M GDDR SDRAM K4D26323QG-GC - 10 - Rev 1.2(Mar. 2005) Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. Functional operation should be restricted to recommended operating condition. Exposure to higher than recommended voltage for extended periods of time could affect device reliability. Note : POWER & DC OPERATING CONDITIONS(SSTL In/Out) Recommended operating conditions(Voltage referenced to VSS=0V, TA=0 to 65 °C) Parameter Symbol Min Typ Max Unit Note Device Supply voltage VDD 1.7 1.8 1.9 V 1,8 Output Supply voltage VDDQ 1.7 1.8 1.9 V 1,8 Reference voltage VREF 0.49*VDDQ - 0.51*VDDQ V2 Termination voltage Vtt VREF-0.04 VREF VREF+0.04 V 3 Input logic high voltage VIH(DC) VREF+0.15 - VDDQ+0.30 V 4 Input logic low voltage VIL(DC) -0.30 - VREF-0.15 V 5 Output logic high voltage VOH Vtt+0.76 - - V IOH=-15.2mA, 7 Output logic low voltage VOL - - Vtt-0.76 V IOL=+15.2mA, 7 Input leakage current IIL -5 - 5 uA 6 Output leakage current IOL -5 - 5 uA 6 ABSOLUTE MAXIMUM RATINGS Parameter Symbol Value Unit Voltage on any pin relative to Vss VIN, VOUT -0.5 ~ 3.6 V Voltage on VDD supply relative to Vss VDD -1.0 ~ 3.6 V Voltage on VDD supply relative to Vss VDDQ -0.5 ~ 3.6 V Storage temperature TSTG -55 ~ +150 °C Power dissipation PD 3.3 W Short circuit current IOS 50 mA 1. Under all conditions VDDQ must be less than or equal to VDD. 2. VREF is expected to equal 0.50*VDDQ of the transmitting device and to track variations in the DC level of the same. Peak to peak noise on the VREF may not exceed + 2% of the DC value. 3. Vtt of the transmitting device must track VREF of the receiving device. 4. VIH(max.)= VDDQ +1.5V for a pulse width and it can not be greater than 1/3 of the cycle rate. 5. VIL(mim.)= -1.5V for a pulse width and it can not be greater than 1/3 of the cycle rate. 6. For any pin under test input of 0V < VIN < VDD is acceptable. For all other pins that are not under test VIN=0V. 7. Output logic high voltage and low voltage is depend on output channel condition. 8. For K4D26323QG-G(V)C22, VDD&VDDQ=2.0V+0.1V Note : |
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