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BS616LV8018FI-70 Datasheet(PDF) 1 Page - Brilliance Semiconductor |
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BS616LV8018FI-70 Datasheet(HTML) 1 Page - Brilliance Semiconductor |
1 / 8 page Revision 2.1 Jan. 2004 1 R0201-BS616LV8018 Very Low Power/Voltage CMOS SRAM 512K X 16 bit (Dual CE Pins) The BS616LV8018 is a high performance, very low power CMOS Static Random Access Memory organized as 524,288 words by 16 bits and operates from a range of 4.5V to 5.5V supply voltage. Advanced CMOS technology and circuit techniques provide both high speed and low power features with a typical CMOS standby current of 8.0uA at 5V/25oC and maximum access time of 55ns at 5.0V/85oC. Easy memory expansion is provided by an active LOW chip enable(CE1) , active HIGH chip enable (CE2), active LOW output enable(OE) and three-state output drivers. The BS616LV8018 has an automatic power down feature, reducing the power consumption significantly when chip is deselected. The BS616LV8018 is available in 48-pin BGA package. DESCRIPTION FEATURES BLOCK DIAGRAM PRODUCT FAMILY PIN CONFIGURATIONS Brilliance Semiconductor, Inc. reserves the right to modify document contents without notice. BS616LV8018 LB OE A0 A1 A2 CE2 D8 UB A3 A4 CE1 D0 D9 D10 A5 A6 D1 D2 VSS D11 A17 A7 D3 VCC VCC D12 A16 D4 VSS D14 D13 A14 A15 D5 D6 D15 NC . A12 A13 WE D7 A8 A8 A9 A10 A11 NC 1 A B C D E F G H 1 23456 VSS • Vcc operation voltage : 4.5~5.5V • Very low power consumption : Vcc = 5.0V C-grade: 75mA (@55ns) operating current I -grade: 76mA (@55ns) operating current C-grade: 60mA (@70ns) operating current I -grade: 61mA (@70ns) operating current 8.0uA (Typ.) CMOS standby current • High speed access time : -55 -70 • Automatic power down when chip is deselected • Three state outputs and TTL compatible POWER DISSIPATION SPEED (ns) STANDBY (ICCSB1, Max) Operating (ICC, Max) PRODUCT FAMILY OPERATING TEMPERATURE Vcc RANGE PKG TYPE BS616LV8018FC +0 O C to +70 O C 4.5V ~ 5.5V 55 / 70 55uA 75mA 60mA BGA-48-0912 BS616LV8018FI -40 O C to +85 O C 4.5V ~ 5.5V 55 / 70 110uA 76mA 61mA BGA-48-0912 Row Decoder Memory Array 2048 x 4096 Column I/O Write Driver Sense Amp Column Decoder Data Buffer Output A9 A8 A7 Data Buffer Input Control Vss Vcc OE WE CE1 D15 D0 A0 A13 A14 A15 A1 A2 16 16 16 16 16 256 4096 2048 22 A17 A16 A10 A12 A6 A11 A3 Address Input Buffer A5 Address Input Buffer . . . . UB . . . . LB A4 A18 CE2 48-Ball CSP top View BSI 55ns : 4.5~5.5V 70ns : 4.5~5.5V Vcc=5V Vcc=5V 55ns 70ns • Fully static operation • Data retention supply voltage as low as 1.5V • Easy expansion with CE2,CE1 and OE options • I/O Configuration x8/x16 selectable by LB and UB pin Vcc=5V |
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