Data Sheet M15085EJ5V0DS

10

µµµµPD4616112

5

5

5

5

Read Cycle (BC version)

Parameter

Symbol

µPD4616112-BC80

µPD4616112-BC90

Unit

Notes

MIN.

MAX.

MIN.

MAX.

Read cycle time

80

10,000

90

10,000

ns

1

Identical address read cycle time

80

10,000

90

10,000

ns

2

Address skew time

10

20

ns

3

/CS pulse width

10

10

ns

Address access time

80

90

ns

4

/CS access time

80

90

ns

/OE to output valid

35

40

ns

5

/LB, /UB to output valid

35

40

ns

Output hold from address change

10

10

ns

/CS to output in low impedance

10

10

ns

/OE to output in low impedance

55

ns

/LB, /UB to output in low impedance

55

ns

/CS to output in high impedance

25

25

ns

/OE to output in high impedance

25

25

ns

/LB, /UB to output in high impedance

25

25

ns

indicates the time from the /CS low level input point or address change start point, whichever is later, to

the /CS high level input point or the next address change start point, whichever is earlier. As a result,

1) Time from address change start point to /CS high level input point

(address access)

2) Time from address change start point to next address change start point

(address access)

3) Time from /CS low level input point to next address change start point

(/CS access)

4) Time from /CS low level input point to /CS high level input point

(/CS access)

continuous read operations toggling /OE , /LB, and /UB with the address fixed and /CS low level. Perform

µs or less.

the next address is determined.

the /CS high level input point.

is determined.

switched from high level to low level following address determination, or when the address is changed after

/CS is switched from low level to high level.

satisfied if /UB and /LB become active before /OE.