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Microcircuit, Linear, Dual MOSFET Drivers,
Monolithic Silicon
SIZE
A
CAGE CODE
09WF0
W98M9640
DATE:
98-09-23
REVISION LEVEL
A
SHEET
4
TABLE II. Electrical Performance Characteristics.
Test
Symbol
Conditions
TJ = +25°C
Group A
Limits
Units
unless otherwise specified
subgroups
Min
Typ
Max
Drain-to-source
breakdown voltage
V(BR)DSS
VGS = 0 V, ID = 250 µA
Room
-200
V
Breakdown voltage
temperature coefficient
∆V
(BR)DS
S/∆TJ
ID = -1 mA
-0.20
V/°C
Static drain-to-source on
resistance
R(DS)ON
VGS = -10 V, ID = 6.6 A
4/
0.50
Ω
Gate threshold voltage
VGS(th)
VDS = VGS, ID = 250 µA
-2.0
-4.0
V
Forward
transconductance
gfs
VDS = -50 V, ID = 6.6 A
4/
4.1
S
Drain-to-source leakage
IDSS
VDS = -200 V, VGS = 0 V
-100
µA
current
VDS = -160 V, VGS = 0 V
Max.
-500
Gate-to-source forward
leakage current
IGSS
VGS = -20 V
Room
-100
nA
Gate-to-source reverse
leakage current
VGS = 20 V
100
Total gate charge
Qg
ID = -11 A
44
nC
Gate-to-source charge
Qgs
VDS = -160 V
7.1
Gate-to-drain (Miller)
charge
Qgd
VGS = -10 V (see Figures 3.6 and
3.13)
4/
27
Turn-on delay time
td(ON)
VDD = -100 V
14
ns
Rise time
tr
ID = -11 A
43
Turn-off delay time
td(off)
RG = 9.1 Ω
39
Fall time
tf
RG = 8.6 Ω (see Figure 2.10)
4/
38
Internal drain inductance
LD
Between lead, 6 mm (0.25in) from
4.5
nH
Internal source
inductance
LS
package and center of die contact
5A/
7.5
Input capacitance
CISS
VGS = 0 V
1200
pF
Output capacitance
COSS
VDS = -25 V
370
Reverse transfer
capacitance
CrSS
f = 1.0 MHz (see Figure 2.5)
81
See footnotes at end of table.