9

µµµµPD444016-Y

Preliminary Data Sheet M15391EJ1V0DS

Write Cycle

Parameter

Symbol

µPD444016-8Y

µPD444016-10Y

µPD444016-12Y

Unit

Notes

MIN.

MAX.

MIN.

MAX.

MIN.

MAX.

Write cycle time

810

12

ns

/CS to end of write

678

ns

Address valid to end of write

678

ns

Write pulse width

678

ns

/LB, /UB to end of write

678

ns

Data valid to end of write

456

ns

Data hold time

000

ns

Address setup time

000

ns

Write recovery time

000

ns

/WE to output in high impedance

4

5

6

ns

1, 2

Output active from end of write

333

ns

Notes 1. Transition is measured at

± 200 mV from steady-state voltage with the output load shown in Figure 2.

2. These parameters are not 100% tested.

Write Cycle Timing Chart 1 (/WE Controlled)

Address (Input)

/CS (Input)

/WE (Input)

I/O (Input / Output)

High

impe-

dance

High

impe-

dance

Indefinite data out

Data in

Indefinite data out

/LB, /UB (Input)

Cautions 1. /CS or /WE should be fixed to high level during address transition.

2. Do not input data to the I/O pins while they are in the output state.

Remarks 1. Write operation is done during the overlap time of a low level /CS, /LB and/or /UB, and a low level /WE.

2. When /WE is at low level, the I/O pins are always high impedance. When /WE is at high level, read

operation is executed. Therefore /OE should be at high level to make the I/O pins high impedance.