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UPD444004LLE-A12 Datasheet(PDF) 9 Page - NEC |
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UPD444004LLE-A12 Datasheet(HTML) 9 Page - NEC |
9 / 16 page 9 µµµµPD444004L Data Sheet M14427EJ4V0DS Write Cycle Parameter Symbol -A8 -A10 -A12 Unit Notes MIN. MAX. MIN. MAX. MIN. MAX. Write cycle time tWC 810 12 ns /CS to end of write tCW 67 8 ns Address valid to end of write tAW 67 8 ns Write pulse width tWP 67 8 ns Data valid to end of write tDW 45 6 ns Data hold time tDH 00 0 ns Address setup time tAS 00 0 ns Write recovery time tWR 00 0 ns /WE to output in high impedance tWHZ 45 6 ns 1, 2 Output active from end of write tOW 33 3 ns Notes 1. Transition is measured at ± 200 mV from steady-state voltage with the output load shown in Figure 2. 2. These parameters are periodically sampled and not 100% tested. Write Cycle Timing Chart 1 (/WE Controlled) tWC tCW tWP tAS tWR Address (Input) /CS (Input) /WE (Input) I/O (Input / Output) tDH tWHZ tAW High impe- dance High impe- dance tOW Indefinite data out Data in Indefinite data out tDW Cautions 1. /CS or /WE should be fixed to high level during address transition. 2. Do not input data to the I/O pins while they are in the output state. Remarks 1. Write operation is done during the overlap time of a low level /CS and a low level /WE. 2. When /WE is at low level, the I/O pins are always high impedance. When /WE is at high level, read operation is executed. Therefore /OE should be at high level to make the I/O pins high impedance. |
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