LTC6903/LTC6904

6

69034fa

APPLICATIO S I FOR ATIO

Frequency Setting Information

The frequency output of the LTC6903/LTC6904 is deter-

mined by the following equation:

f

Hz

DAC

OCT

=









2

2078

2

1024

•

()

–

where DAC is the integer value from 0-1023 represented

by the serial port register bits DAC[9:0] and OCT is the

integer value from 0-15 represented by the serial port

register bits OCT [3:0].

The LTC6903/LTC6904 contain an internal feedback loop

which controls a high frequency square wave VCO operat-

ing between 34MHz and 68MHz. The internal feedback

loop frequency is set over an octave by a 10-bit resistor

DAC. The VCO tracks the internal feedback loop frequency

and the output frequency of the VCO is divided by one of

sixteen possible powers of two.

Higher VCO frequencies and lower output divider settings

can result in higher output jitter. Random jitter at the lower

Use the following two steps to choose binary numbers

“OCT” and “DAC” in order to set frequency “f”:

1) Use Table 1 to Choose “OCT” or use the following

formula, rounding down to the integer value less than or

equal to the result.

OCT

f

=









3 322

1039

.

log

2) Choose “DAC” by the following formula, rounding DAC

to the nearest integer:

DAC

Hz

f

OCT

=

+

2048

2078

–

frequency ranges is very low because of the high output

divisor.

The higher frequency settings will display some determin-

istic jitter from coupling between the control loop and the

output. This shows up in the frequency spectrum as spurs

separated from the fundamental frequency by 1MHz to

2MHz.

THEORY OF OPERATIO

2

1

3

4

6

7

5

8

–

+

MASTER

OSCILLATOR

PROGRAMMABLE

DIVIDER

+

–

A1

SERIAL PORT

OE

GND

DAC

OCT

SDI

SCK

SEN (LTC6903)

ADR (LTC6904)

CLK

CLK

6903 BD

BLOCK DIAGRA