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TMP90C041 Datasheet(PDF) 6 Page - Toshiba Semiconductor |
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TMP90C041 Datasheet(HTML) 6 Page - Toshiba Semiconductor |
6 / 12 page 6/12 TOSHIBA CORPORATION TMP90C041 3. Operation The following explains the TMP90C041 functions and basic operations. The CPU functions and internal I/O functions of the TMP90C041 are the same as the TMP90C840A. Refer to the “TMP90C840A” section concerning functions which are not explained in the following. 3.1 CPU The TMP90C041 has an internal high-performance 8-bit CPU. Refer to the book TLCS Series CPU Core Architecture concerning CPU operation. 3.2 Memory Map The TMP90C041 supports a program memory of up to 64K bytes and a data memory of maximum 1M bytes. The program memory may be assigned to the address space from 00000H to 0FFFFH, while the data memory can be allocated to any address from 00000H to FFFFFH. (1) Internal I/O The TMP90C041 provides a 48-byte address space as an internal I/O area, whose addresses range from FFC0H to FFEFH. This I/O area can be accessed by the CPU using a short opcode in the “direct addressing mode”. Figure 3.1 is a memory map indicating the areas accessible by the CPU in the respective addressing mode. |
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