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ICSSSTU32864 Datasheet(PDF) 1 Page - Integrated Circuit Systems |
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ICSSSTU32864 Datasheet(HTML) 1 Page - Integrated Circuit Systems |
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1 / 11 page  Integrated Circuit Systems, Inc. ICSSSTU32864 0727C—04/15/04 Recommended Application: • DDR2 Memory Modules • Provides complete DDR DIMM logic solution with ICS97U877 Product Features: • 25-bit 1:1 or 14-bit 1:2 configurable registered buffer • Supports SSTL_18 JEDEC specification on data inputs and outputs • Supports LVCMOS switching levels on CSR# and RESET# inputs 25-Bit Configurable Registered Buffer Truth Table Pin Configuration 96 Ball BGA (Top View) Ball Assignments A B 123456 C D E F G H J K L M N P R T A DCKE NC VREF VDD QCKE NC B D2 D15 GND GND Q2 Q15 C D3 D16 VDD VDD Q3 Q16 D DODT NC GND GND QODT NC E D5 D17 VDD VDD Q5 Q17 F D6 D18 GND GND Q6 Q18 G NC RST# VDD VDD C1 C0 H CK DCS# GND GND QCS# NC J CK# CSR# VDD VDD ZOH ZOL K D8 D19 GND GND Q8 Q19 L D9 D20 VDD VDD Q9 Q20 M D10 D21 GND GND Q10 Q21 N D11 D22 VDD VDD Q11 Q22 P D12 D23 GND GND Q12 Q23 R D13 D24 VDD VDD Q13 Q24 T D14 D25 VREF VDD Q14 Q25 123456 1:1 Register (C0 = 0, C1 = 0) I nputs Outputs RST# DCS# CSR# CK CK# Dn, DODT, DCK E Qn QCS# QODT, QCKE H LL LL L L H LL HH L H H L L L or H L or H X Q0 Q0 Q0 H LH LL L L H LH HH L H H L H L or H L or H X Q0 Q0 Q0 H HL LL H L H HL HH H H H H L L or H L or H X Q0 Q0 Q0 H HH L Q0 H L H HH H Q0 H H H H H L or H L or H X Q0 Q0 Q0 L X or Floating X or Floating X or Floating X or Floating X or Floating LLL • Low voltage operation VDD = 1.7V to 1.9V • Available in 96 BGA package |
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