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MAX8504ETC Datasheet(PDF) 11 Page - Maxim Integrated Products

Part # MAX8504ETC
Description  PWM Buck Converters with Bypass FET for N-CDMA/W-CDMA Handsets
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Manufacturer  MAXIM [Maxim Integrated Products]
Direct Link  https://www.maximintegrated.com/en.html
Logo MAXIM - Maxim Integrated Products

MAX8504ETC Datasheet(HTML) 11 Page - Maxim Integrated Products

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PWM Buck Converters with Bypass FET
for N-CDMA/W-CDMA Handsets
______________________________________________________________________________________
11
Input Capacitor Selection
Capacitor ESR is a major contributor to input ripple in
high-frequency DC-to-DC converters. Ordinary
aluminum electrolytic capacitors have high ESR and
should be avoided. Low-ESR tantalum capacitors or
polymer capacitors are better and provide a compact
solution for space-constrained surface-mount designs.
Ceramic capacitors have the lowest ESR overall.
The input filter capacitor reduces peak currents and
noise at the input voltage source. Connect a low-ESR
bulk capacitor (
≥10µF typ) to the input. Select this bulk
capacitor to meet the input ripple requirements and
voltage rating rather than capacitance value. Use the
following equation to calculate the maximum RMS input
current:
Compensation, Stability, and Output
Capacitor
The MAX8500–MAX8504 are externally compensated
by placing a resistor and a capacitor (see Figures 1
and 2, RC and CC) in series from COMP to GND. An
additional capacitor (Cf) may be required from COMP
to GND if high-ESR output capacitors are used. The
capacitor integrates the current from the transconduc-
tance amplifier, averaging output capacitor ripple. This
sets the device speed for transient response and
allows the use of small ceramic output capacitors
because the phase-shifted capacitor ripple does not
disturb the current-regulation loop. The resistor sets
the proportional gain of the output error voltage by a
factor gm RC. Increasing this resistor also increases
the sensitivity of the control loop to output ripple.
The resistor and capacitor set a compensation zero that
defines the system’s transient response. The load cre-
ates a dynamic pole, shifting in frequency with changes
in load. As the load decreases, the pole frequency shifts
to the left. System stability requires that the compensa-
tion zero must be placed to ensure adequate phase
margin (at least 30° at unity gain). See Figures 1 and 2
for RC and CC recommended values.
Inductor Selection
A 4µH to 6µH inductor is recommended for most appli-
cations. For best efficiency, the inductor’s DC resis-
tance should be <400m
Ω. Saturation current (ISAT)
should be greater than the maximum DC load at the
PA’s supply plus half the inductor current ripple. Two-
step VCC applications typically require very small
inductors with ISAT in the 200mA to 300mA region. See
Table 1 and Table 2 for recommended inductors and
manufacturers.
PC Board Layout and Routing
High switching frequencies and large peak currents
make PC board layout a very important part of design.
Good design minimizes EMI, noise on the feedback
paths, and voltage gradients in the ground plane, all of
which can result in instability or regulation errors.
Connect the inductor, input filter capacitor, and output
filter capacitor as close together as possible and keep
their traces short, direct, and wide. Connect their
ground pins at a single common node in a star ground
configuration. The external voltage-feedback network
should be very close to the FB pin, within 0.2in (5mm).
Keep noisy traces, such as those from the LX pin, away
from the voltage-feedback network. Position the bypass
capacitors as close as possible to their respective pins
to minimize noise coupling. For optimum performance,
place input and output capacitors as close to the
device as possible. Connect GND and PGND directly
under the IC to the exposed paddle. The MAX8504
evaluation kit manual illustrates an example PC board
layout and routing scheme.
Chip Information
TRANSISTOR COUNT: 2530
PROCESS: BiCMOS
I
I
V
VV
V
RMS
OUT
IN
OUT
IN
OUT
×
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