Clock Generator for Pentium
III Server and Workstation Applications
Cypress Semiconductor Corporation
525 Los Coches St.
Document#: 38-07068 Rev. **
05/04/2001
Milpitas, CA 95035. Tel: 408-263-6300, Fax: 408-263-6571
Page 10 of 14
http://www.cypress.com
PRELIMINARY
C9851
Current Accuracy
Conditions
Configuration
Load
Min
Max
Iout
VDD = nominal (3.30V)
All combinations of M0, M1
and Rr shown in host Swing
Select Function Table 5, p. 8
Nominal test load for
given configuration
-7% Inom
+ 7% Inom
Iout
VDD = 3.30 +/- 5%
All combinations of M0, m1
and Rr shown in Host Swing
Select Function Table 5, p. 8
Nominal test load for
given configuration
-12% Inom
+ 12% Inom
Note: Inom refers to the expected current based on the configuration of the device.
Buffer Characteristics for REF
Characteristic
Symbol
Min
Typ
Max
Units
Conditions
Pull-Up Current Min
IOHmin
-12
-53
mA
VOH=VDDmin-0.5V (2.64V)
Pull-Up Current Max
IOHmax
-27
-92
mA
VOH=VDDmin/2 (1.56V)
Pull-Down Current Min
IOLmin
927
mA
VOL=0.4V
Pull-Down Current Max
IOLmax
26
79
mA
VOL=VDDmin/2 (1.56V)
3.3V Output Rise Edge Rate
Trh
0.5
-
2.0
V/nS
3.3V +/- 5% @ 0.4V – 2.4 V
3.3V Output Fall Edge Rate
Tfh
0.5
-
2.0
V/nS
3.3V +/- 5% @ 2.4V – 0.4 V
Buffer Characteristics for 3V66, Mref, Mref_b
Characteristic
Symbol
Min
Typ
Max
Units
Conditions
Pull-Up Current Min
IOHmin
-11
-83
mA
VOH=VDD-0.5V (2.64V)
Pull-Up Current Max
IOHmax
-30
-184
mA
V OH=VDD/2 (1.56V)
Pull-Down Current Min
IOLmin
938
mA
VOL=0.4V
Pull-Down Current Max
IOLmax
28
148
mA
VOL=VDD/2 (1.56V)
3.3V Output Rise Edge Rate
Trh
1/1
-
4/1
V/nS
3.3V +/- 5% @ 0.4V – 2.4 V
3.3V Output Fall Edge Rate
Tfh
1/1
-
4/1
V/nS
3.3V +/- 5% @ 2.4V – 0.4 V
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
