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M28C16-250P6T Datasheet(PDF) 1 Page - STMicroelectronics |
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M28C16-250P6T Datasheet(HTML) 1 Page - STMicroelectronics |
1 / 17 page M28LV16 16K (2K x 8) LOW VOLTAGE PARALLEL EEPROM with SOFTWARE DATA PROTECTION NOT FOR NEW DESIGN November 1997 1/17 This is information on a product still in production bu t not recommended for new de sign. AI01567B 11 A0-A10 W DQ0-DQ7 VCC M28LV16 G E VSS 8 RB * Figure 1. Logic Diagram A0 - A10 Address Input DQ0 - DQ7 Data Input / Output W Write Enable E Chip Enable G Output Enable RB Ready / Busy VCC Supply Voltage VSS Ground Table 1. Signal Names FAST ACCESS TIME: 200ns SINGLE LOW VOLTAGE OPERATION LOW POWER CONSUMPTION FAST WRITE CYCLE: – 64 Bytes Page Write Operation – Byte or Page Write Cycle: 3ms Max ENHANCED END OF WRITE DETECTION: – Data Polling – Toggle Bit PAGE LOAD TIMER STATUS BIT HIGH RELIABILITY SINGLE POLYSILICON, CMOS TECHNOLOGY: – Endurance >100,000 Erase/Write Cycles – Data Retention >40 Years JEDEC APPROVED BYTEWIDE PIN OUT SOFTWARE DATA PROTECTION M28LV16 is replaced by the products described on the document M28C16A DESCRIPTION The M28LV16 is a 2K x 8 low power Parallel EEPROM fabricatedwith SGS-THOMSON proprie- tary single polysilicon CMOS technology. The de- vice offers fast access time with low power dissipation and requires a 2.7V to 3.6V power supply. The circuit has been designed to offer a flexible microcontroller interface featuring both hardware and software handshaking with Data Polling and Toggle Bit. The M28LV16 supports 64 byte page write operation. A Software Data Protec- tion (SDP) is also possible using the standard JEDEC algorithm. 24 1 PDIP24 (P) TSOP28 (N) 8 x 13.4mm PLCC32 (K) 24 1 SO24 (MS) 300 mils Note: * RB function is offered only with TSOP28 package. |
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