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PTH05050WAD Datasheet(PDF) 3 Page - Texas Instruments

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Part # PTH05050WAD
Description  6-A, 5-V Input Non-Isolated Wide-Output Adjust Power Module
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

PTH05050WAD Datasheet(HTML) 3 Page - Texas Instruments

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For technical support and further information, visit http://power.ti.com
Environmental & Absolute Maximum Ratings (Voltages are with respect to GND)
Characteristics
Symbols
Conditions
Min
Typ
Max
Units
Track Input Voltage
Vtrack
–0.3
Vin + 0.3
V
Operating Temperature Range
Ta
Over Vin Range
–40 (i)
85
°C
Solder Reflow Temperature
Treflow
Surface temperature of module body or pins
235 (ii)
°C
Storage Temperature
Ts
–40
125
°C
Mechanical Shock
Per Mil-STD-883D, Method 2002.3
500
G’s
1 msec, ½ Sine, mounted
Mechanical Vibration
Mil-STD-883D, Method 2007.2
—20
G’s
20-2000 Hz
Weight
2.9
grams
Flammability
Meets UL 94V-O
Notes:
(i) For operation below 0 °C the external capacitors m ust bave stable characteristics. use either a low ESR tantalum, Os-Con, or ceramic capacitor.
(ii) During reflow of SMD package version do not elevate peak temperature of the module, pins or internal components above the stated maximum.
6-A, 5-V Input Non-Isolated
Wide-Output Adjust Power Module
PTH05050W —5-V Input
SLTS213C – MAY 2003 – REVISED MAY 2004
Specifications (Unless otherwise stated, T
a =25 °C, Vin =5 V, Vo =3.3 V, Cin =100 µF, Co1 =0 µF, Co2 =0µF, and Io =Iomax)
PTH05050W
Characteristics
Symbols
Conditions
Min
Typ
Max
Units
Output Current
Io
0.8 V
≤ Vo ≤ 3.6 V,
85°C, natural convection
0
6
(1)
A
Input Voltage Range
Vin
Over Io range
4.5
5.5
V
Set-Point Voltage Tolerance
Vo tol
±2 (2)
%Vo
Temperature Variation
∆Reg
temp
–40 °C <Ta < +85 °C
±0.5
%Vo
Line Regulation
∆Regline
Over Vin range
±10
mV
Load Regulation
∆Reg
load
Over Io range
±12
mV
Total Output Variation
∆Regtot
Includes set-point, line, load,
——±3 (2)
%Vo
–40 °C
≤ T
a ≤ +85 °C
Efficiency
η
Io =4 A
RSET = 698 Ω
Vo = 3.3 V
95
RSET = 2.21 kΩ Vo = 2.5 V
93
RSET = 4.12 kΩ Vo = 2.0 V
91
%
RSET = 5.49 kΩ Vo = 1.8 V
90
RSET = 8.87 kΩ Vo = 1.5 V
89
RSET = 17.4 kΩ Vo = 1.2 V
87
RSET = 36.5 kΩ Vo = 1.0 V
85
Vo Ripple (pk-pk)Vr
20 MHz bandwidth, Co2 =10 µF ceramic
20 (3)
mVpp
Over-Current Threshold
Io trip
Reset, followed by auto-recovery
12
A
Transient Response
1 A/µs load step, 50 to 100 % Iomax,
Co1 =100 µF
ttr
Recovery Time
70
µSec
∆V
tr
Vo over/undershoot
100
mV
Track Input Current (pin 2)IIL track
Pin to GND
–130 (4)
µA
Track Slew Rate Capability
dVtrack/dt
Cout ≤ Cout(max)—
1
V/ms
Under-Voltage Lockout
UVLO
Vin increasing
4.3
4.45
V
Vin decreasing
3.4
3.7
Inhibit Control (pin4)Referenced to GND
Input High Voltage
VIH
Vin –0.5
Open (4)
V
Input Low Voltage
VIL
–0.2
0.6
Input Low Current
IIL inhibit
Pin to GND
–130
µA
Input Standby Current
Iin inh
Inhibit (pin 4) to GND, Track (pin 2) open
10
mA
Switching Frequency
ƒs
Over Vin and Io ranges
550
600
650
kHz
External Input Capacitance
Cin
100 (5)
——µF
External Output Capacitance
Co1, Co2
Capacitance value
non-ceramic
0
100 (6)
3,300 (7)
µF
ceramic
0
300
Equiv. series resistance (non-ceramic)4 (8)
——m
Reliability
MTBF
Per Bellcore TR-332
6
——106 Hrs
50 % stress, Ta =40 °C, ground benign
Notes: (1) No derating is required when the module is soldered directly to a 4-layer PCB with 1 oz. copper.
(2) The set-point voltage tolerance is affected by the tolerance and stability ofRSET. The stated limit is unconditionally met if RSET has a tolerance of 1 %
with 100 ppm/°C or better temperature stability.
(3) The pk-pk output ripple voltage is measured with an external 10 µF ceramic capacitor. See the standard application schematic.
(4) This control pin has an internal pull-up to the input voltage Vin. If it is left open-circuit the module will operate when input power is applied. A small
low-leakage (<100 nA) MOSFET is recommended for control. For further information, consult the related application note.
(5) A 100 µF input capacitor is required for proper operation. The capacitor must be rated for a minimum of 300 mA rms of ripple current.
(6) An external output capacitor is not required for basic operation. Adding 100 µF of distributed capacitance at the load will improve the transient response.
(7) This is the calculated maximum. The minimum ESR limitation will often result in a lower value. Consult the application notes for further guidance.
(8) This is the typcial ESR for all the electrolytic (non-ceramic) output capacitance. Use 7 m
Ω as the minimum when using max-ESR values to calculate.


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