10

Driving Capacitive Loads and Cables

The EL8100, EL8101 can drive 10pF loads in parallel with

1k

Ω with less than 5dB of peaking at gain of +1. If less

peaking is desired in applications, a small series resistor

(usually between 5

Ω to 50Ω) can be placed in series with the

output to eliminate most peaking. However, this will reduce

the gain slightly. If the gain setting is greater than 1, the gain

which may be created by the additional series resistor at the

output.

When used as a cable driver, double termination is always

recommended for reflection-free performance. For those

applications, a back-termination series resistor at the

amplifier’s output will isolate the amplifier from the cable and

allow extensive capacitive drive. However, other applications

may have high capacitive loads without a back-termination

resistor. Again, a small series resistor at the output can help

to reduce peaking.

Disable/Power-Down

The EL8300 can be disabled and placed its output in a high

impedance state. The turn off time for each channel is about

25ns and the turn on time is about 200ns. When disabled,

the amplifier’s supply current is reduced to 30µA typically,

thereby effectively eliminating the power consumption. The

amplifier’s power down can be controlled by standard TTL or

CMOS signal levels at the ENABLE pin. The applied logic

the amplifier. The amplifier will be disabled when the signal

Output Drive Capability

The EL8300 does not have internal short circuit protection

circuitry. They have a typical short circuit current of 70mA

sourcing and 140mA sinking for the output is connected to

half way between the rails with a 10

Ω resistor. If the output is

shorted indefinitely, the power dissipation could easily

increase such that the part will be destroyed. Maximum

reliability is maintained if the output current never exceeds

±40mA. This limit is set by the design of the internal metal

interconnections.

Power Dissipation

With the high output drive capability of the EL8300, it is

possible to exceed the 125

°C absolute maximum junction

temperature under certain load current conditions.

Therefore, it is important to calculate the maximum junction

temperature for the application to determine if the load

conditions or package types need to be modified for the

amplifier to remain in the safe operating area.

The maximum power dissipation allowed in a package is

determined according to:

Where:

The maximum power dissipation actually produced by an IC

is the total quiescent supply current times the total power

supply voltage, plus the power in the IC due to the load, or:

For sourcing:

For sinking:

Where:

each channel

overheat.

Power Supply Bypassing and Printed Circuit

Board Layout

As with any high frequency device, a good printed circuit

board layout is necessary for optimum performance. Lead

lengths should be as sort as possible. The power supply pin

must be well bypassed to reduce the risk of oscillation. For

connected to the ground plane, a single 4.7µF tantalum

to GND will suffice. This same capacitor combination should

be placed at each supply pin to ground if split supplies are to

supply rail.

For good AC performance, parasitic capacitance should be

kept to a minimum. Use of wire wound resistors should be

avoided because of their additional series inductance. Use

of sockets should also be avoided if possible. Sockets add

parasitic inductance and capacitance that can result in

compromised performance. Minimizing parasitic capacitance

at the amplifier’s inverting input pin is very important. The

feedback resistor should be placed very close to the

inverting input pin. Strip line design techniques are

recommended for the signal traces.

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EL8300