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M61530FP Datasheet(PDF) 6 Page - Renesas Technology Corp |
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M61530FP Datasheet(HTML) 6 Page - Renesas Technology Corp |
6 / 19 page M61530FP Rev.1.0, Sep.19.2003, page 6 of 18 Relation between DATA and CLOCK The data signal is read on the rising edges of the CLOCK signal D0 D1 D2 D3 D13 D14 D15 Latch condition CLOCK DATA 1. Data transmission The DATA signal is read on the rising edges of the CLOCK signal. The DATA line must always be low on the falling edge of the CLOCK signal during transmission of the DATA signal. 2. Data Latch Data for this IC is in 16-bits (D0 to D15) words. Latch the transmitted data by driving the DATA line high on the falling edge of the CLOCK signal after the transmission of D15. The DATA line is driven high to latch D0 to D15 at this time CLOCK and DATA timing tWHC tcr 25% 75% DATA CLOCK (D15) L ATCH signal tWLC tf tr tHLD tSHD tHHD tSLD tHLD (D0 to D15) tSLD |
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