DDR SDRAM

Rev. 1.2 May. 2003

128MB, 256MB, 512MB Unbuffered DIMM

SAMSUNG ELECTRONICS CO., Ltd. reserves the right to change products and specifications without notice.

Ordering Information

Operating Frequencies

Part Number

Density

Organization

Component Composition

Height

M368L1624DTM-C(L)CC/C4

128MB

16M x 64

16Mx16( K4H561638D) * 4EA

1,250(mil)

M368L3223DTM-C(L)CC/C4

256MB

32M x 64

32Mx8( K4H560838D) * 8EA

1,250(mil)

M368L6423DTM-C(L)CC/C4

512MB

64M x 64

32Mx8( K4H560838D) * 16EA

1,250(mil)

M381L3223DTM-C(L)CC/C4

256MB

32M x 72

32Mx8( K4H560838D) * 9EA

1,250(mil)

M381L6423DTM-C(L)CC/C4

512MB

64M x 72

32Mx8( K4H560838D) * 18EA

1,250(mil)

CC(DDR400@CL=3)

C4(DDR400@CL=3)

Speed @CL3

200MHz

200MHz

CL-tRCD-tRP

3-3-3

3-4-4

Feature

• Power supply : Vdd: 2.6V ± 0.1V, Vddq: 2.6V ± 0.1V

• Bidirectional data strobe(DQS)

• Differential clock inputs(CK and CK)

• DLL aligns DQ and DQS transition with CK transition

• Programmable Read latency 3 (clock) for DDR400 , 2.5 (clock) for DDR333

• Programmable Burst length (2, 4, 8)

• Programmable Burst type (sequential & interleave)

• Edge aligned data output, center aligned data input

• Auto & Self refresh, 7.8us refresh interval(8K/64ms refresh)

• Serial presence detect with EEPROM

• PCB : Height 1,250 (mil), single (128MB, 256MB) and double(512MB) sided

• SSTL_2 Interface

184Pin Unbuffered DIMM based on 256Mb D-die (x8, x16)