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www.ti.com SIMPLIFIED BLOCK DIAGRAM LINE_OUT_L+ LINE_OUT_L- LINE_OUT_R+ LINE_OUT_R- HPR+ HPL-/HPLCOM HPL+ MIC2/LINE2L MIC1/LINE1L MIC1/LINE1R MIC3/LINE3R MIC3/LINE3L PGA 0/+59.5dB 0.5dB steps ADC ADC Audio Serial Bus DAC L DAC R I C 2 Control Bus Audio Clock Generation Bias/ Reference Voltage Supplies Volume Ctl & Effects Volume Ctl & Effects MIC2/LINE2R + + VCM + + + HPR-/HPRCOM/ SPKFC + VCM PGA 0/+59.5dB 0.5dB steps + + TLV320AIC32 SLAS479A – AUGUST 2005 – REVISED SEPTEMBER 2005 The TLV320AIC32 operates from an analog supply of 2.7 V – 3.6 V, a digital core supply of 1.525 V – 1.95 V, and a digital I/O supply of 1.1 V – 3.6 V. The device is available in a 5 × 5 mm, 32-lead QFN package. Figure 1. Simplified Codec Block Diagram PACKAGE/ORDERING INFORMATION OPERATING PACKAGE TRANSPORT PRODUCT PACKAGE TEMPERATURE ORDERING NUMBER DESIGNATOR MEDIA, QUANTITY RANGE TLV320AIC32 QFN-32 RHB –40 °C to 85°C TLV320AIC32IRHB Rails, 73 TLV320AIC32IRHBR Tape and Reel, 3000 2 |
