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24AA32AX Datasheet(PDF) 6 Page - Microchip Technology

Part # 24AA32AX
Description  32KIC Serial EEPROM
Download  26 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

24AA32AX Datasheet(HTML) 6 Page - Microchip Technology

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24AA32A/24LC32A
DS21713D-page 6
 2003 Microchip Technology Inc.
3.6
Device Addressing
A control byte is the first byte received following the
Start condition from the master device (Figure 3-2).
The control byte consists of a four-bit control code. For
the 24XX32A, this is set as ‘1010’ binary for read and
write operations. The next three bits of the control byte
are the Chip Select bits (A2, A1, A0). The Chip Select
bits allow the use of up to eight 24XX32A devices on
the same bus and are used to select which device is
accessed. The Chip Select bits in the control byte must
correspond to the logic levels on the corresponding A2,
A1, and A0 pins for the device to respond. These bits
are in effect the three Most Significant bits of the word
address.
The last bit of the control byte defines the operation to
be performed. When set to a ‘1’, a read operation is
selected. When set to a zero, a write operation is
selected. The next two bytes received define the
address of the first data byte (Figure 3-3). Because
only A11 to A0 are used, the upper four address bits are
don’t care bits. The upper address bits are transferred
first, followed by the less significant bits.
Following the Start condition, the 24XX32A monitors
the SDA bus checking the device type identifier being
transmitted and, upon receiving a ‘1010’ code and
appropriate device select bits, the slave device outputs
an Acknowledge signal on the SDA line. Depending on
the state of the R/W bit, the 24XX32A will select a read
or write operation.
FIGURE 3-2:
CONTROL BYTE FORMAT
3.7
Contiguous Addressing Across
Multiple Devices
The Chip Select bits A2, A1, A0 can be used to expand
the contiguous address space for up to 256K bits by
adding up to eight 24XX32A's on the same bus. In this
case, software can use A0 of the control byte as
address bit A12, A1 as address bit A13, and A2 as
address bit A14. It is not possible to sequentially read
across device boundaries.
FIGURE 3-3:
ADDRESS SEQUENCE BIT ASSIGNMENTS
1
0
1
0
A2
A1
A0
SACK
R/W
Control Code
Chip Select
Bits
Slave Address
Acknowledge Bit
Start Bit
Read/Write Bit
1
010
A
2
A
1
A
0 R/W
X
XXX
A
11
A
10
A
9
A
7
A
0
A
8
••
••
CONTROL BYTE
ADDRESS HIGH BYTE
ADDRESS LOW BYTE
CONTROL
CODE
CHIP
SELECT
BITS
X = Don’t Care Bit


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