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AT83EB5114 Datasheet(PDF) 10 Page - ATMEL Corporation |
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AT83EB5114 Datasheet(HTML) 10 Page - ATMEL Corporation |
10 / 95 page 10 4311A–8051–01/05 Figure 3. Power-Up and Steady-state Conditions Monitored The POR/PFD forces the CPU into reset mode when VCC reaches a voltage condition which is out of specification. The thresholds and their functions are: • VPFDP: the Vcc has reached a minimum functional value at power-up. The circuit leaves the RESET mode • VPFDM: the Vcc has reached a low threshold functional value for the microcontroller. An internal RESET is set. Glitch filtering prevents the system from RESET when short duration glitches are carried on Vcc power-supply (See “Electrical Characteristics” on page 84.). In case Vcc is below VPFDP, LOWVD bit in AUXR (See Table 12 on page 23) is cleared by hardware. This bit allows the user to know if the voltage is below VPFDP. Note: For proper reset operation V CCA and VCC must be considered together (same power source). However, to improve the noise immunity, it is better to have two decou- pling networks close to power pins (one for V CCA/VSSA pair and one for VCC/VSS pair). Power-up Steady State Condition Vcc t Reset VPFDP VPFDM tG Vcc tR |
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