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GD5F2GQ4RFZIS Datasheet(PDF) 33 Page - GigaDevice Semiconductor (Beijing) Inc.

Part # GD5F2GQ4RFZIS
Description  SPI(x1/x2/x4) NAND Flash
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Manufacturer  GIGADEVICE [GigaDevice Semiconductor (Beijing) Inc.]
Direct Link  http://www.gigadevice.com/
Logo GIGADEVICE - GigaDevice Semiconductor (Beijing) Inc.

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SPI(x1/x2/x4) NAND Flash
2G
33
11.4 Program Execute (PE) (10H)
After the data is loaded, a PROGRAM EXECUTE (10H) command must be issued to initiate the transfer of data from the
cache register to the main array. PROGRAM EXECUTE consists of an 8-bit Op code, followed by a 24-bit address. After
the page/block address is registered, the memory device starts the transfer from the cache register to the main array, and
is busy for tPROG time. This operation is shown in Figure11-3. During this busy time, the status register can be polled to
monitor the status of the operation (refer to Status Register). When the operation completes successfully, the next series
of data can be loaded with the PROGRAMLOAD command.
Figure11-3. Program Execute Sequence Diagram
Command
0
1
2
3
4
5
6
7
10H
CS#
SCLK
SI
SO
High-Z
8
9 10
28 29 30 31
3
2
1
0
23 22 21
24-bit address
CS#
get feature
0
1
2
3
4
5
6
7
0FH
CS#
SCLK
SI
SO
High-Z
8
9 10 11 12 13 14 15
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
MSB
Status register address
Status register data out
MSB
SCLK
SI
SO
tCS
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34
7
6
5
4
3
2
1
0
Status register data out
7
6
MSB


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