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2N4264 Datasheet(PDF) 3 Page - ON Semiconductor

Part # 2N4264
Description  General Purpose Transistor(NPN Silicon)
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Manufacturer  ONSEMI [ON Semiconductor]
Direct Link  http://www.onsemi.com
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2N4264 Datasheet(HTML) 3 Page - ON Semiconductor

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2N4264
3
Motorola Small–Signal Transistors, FETs and Diodes Device Data
CURRENT GAIN CHARACTERISTICS
Figure 2. Minimum Current Gain
IC, COLLECTOR CURRENT (mA)
20
30
50
70
100
2.0
3.0
10
50
70
10
100
1.0
200
30
20
5.0
7.0
2N4264
VCE = 1 V
TJ = 125°C
25
°C
–15
°C
–55
°C
When a transistor is held in a conductive state by a base current, IB,
a charge, QS, is developed or “stored” in the transistor. QS may be
written: QS = Q1 + QV + QX.
Q1 is the charge required to develop the required collector current.
This charge is primarily a function of alpha cutoff frequency. QV is the
charge required to charge the collector–base feedback capacity. QX is
excess charge resulting from overdrive, i.e., operation in saturation.
The charge required to turn a transistor “on” to the edge of saturation
is the sum of Q1 and QV which is defined as the active region charge,
QA. QA = IB1tr when the transistor is driven by a constant current step
(IB1) and IB1 < <
IC
hFE
.
If IB were suddenly removed, the transistor would continue to
conduct until QS is removed from the active regions through an
external path or through internal recombination. Since the internal
recombination time is long compared to the ultimate capability of a
transistor, a charge, QT, of opposite polarity, equal in magnitude, can
be stored on an external capacitor, C, to neutralize the internal charge
and considerably reduce the turn–off time of the transistor. Figure 3
shows the test circuit and Figure 4 the turn–off waveform. Given QT
from Figure 13, the external C for worst–case turn–off in any circuit is:
C = QT/∆V, where ∆V is defined in Figure 3.
NOTE 1
Figure 3. QT Test Circuit
Figure 4. Turn–Off Waveform
+10 V
t1
∆V
<1 ns
3 V
270
8 pF
9.2 k
CS < 4 pF
C
COPT
TIME
C < COPT
C = 0
PULSE WIDTH (t1) = 5 µs DUTY CYCLE = 2%
0


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