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AT28C010-12DK-M Datasheet(PDF) 1 Page - ATMEL Corporation |
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AT28C010-12DK-M Datasheet(HTML) 1 Page - ATMEL Corporation |
1 / 17 page Rev. 4259A–AERO–06/03 1 Features • Fast Read Access Time – 120 ns • Automatic Page Write Operation – Internal Address and Data Latches for 128 Bytes – Internal Control Timer • Fast Write Cycle Time – Page Write Cycle Time – 10 ms Maximum – 1 to 128-byte Page Write Operation • Low Power Dissipation – 80 mA Active Current – 300 µA CMOS Standby Current • Hardware and Software Data Protection • DATA Polling for End of Write Detection • High Reliability CMOS Technology – Endurance: 10 4 or 105 Cycles – Data Retention: 10 Years • Operating Range: 4.5V to 5.5V, -55 to +125°C • CMOS and TTL Compatible Inputs and Outputs • Batch Tested for 10 Krad TID and 70 MeV Latch-up Capability • JEDEC Approved byte-Wide Pinout • 435 Mils Wide 32-Pin Flat Pack Package Description The AT28C010-12DK is a high-performance Electrically Erasable and Programmable Read-Only Memory. Its one megabit of memory is organized as 131,072 words by 8 bits. Manufactured with Atmel’s advanced nonvolatile CMOS technology, the device offers access times to 120 ns with power dissipation of just 440 mW. When the device is deselected, the CMOS standby current is less than 300 µA. The AT28C010-12DK is accessed like a Static RAM for the read or write cycle without the need for external components. The device contains a 128-byte page register to allow writing of up to 128 bytes simultaneously. During a write cycle, the address and 1 to 128 bytes of data are internally latched, freeing the address and data bus for other operations. Following the initiation of a write cycle, the device will automatically write the latched data using an internal control timer. The end of a write cycle can be detected by DATA POLLING of I/O7. Once the end of a write cycle has been detected a new access for a read or write can begin. Atmel's 28C010 has additional features to ensure high quality in manufacturing. The device utilizes internal error correction for extended endurance and improved data retention characteristics. An optional software data protection mechanism is available to guard against inadvertent writes. The device also includes an extra 128 bytes of EEPROM for device identification or tracking. AT28C010-12DK Mil Space 1-megabit (128K x 8) Paged Parallel EEPROMs AT28C010-12DK Preliminary |
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