EM39LV040

4M (512Kx8) Bits Flash Memory

SPECIFICATION

EM39LV040 Device Operation

Operation

CE#

OE#

WE#

DQ

Address

Read

Program

Erase

Sector or Block address, XXH for

Chip-Erase

Standby

X

X

High Z

X

Write Inhibit

X

X

X

Write Inhibit

X

X

X

Software Mode

See Table 3

Product

Identification

Table 2: EM39LV040 Device Operation

Write Command/Command Sequence

The EM39LV040 provides two software methods to detect the completion of a Program or

Erase cycle in order to optimize the system write cycle time. The software detection includes

two status bits: Data# Polling (DQ7) and Toggle Bit (DQ6). The End-of-Write detection mode

is enabled after the rising edge of WE#, which initiates the internal Program or Erase

operation. The actual completion of the write operation is asynchronous with the system;

therefore, either a Data# Polling or Toggle Bit read may be simultaneously completed with the

write cycle. If this occurs, the system may possibly get an erroneous result, i.e., valid data

may appear to conflict with either DQ7 or DQ6. In order to prevent such spurious rejection,

when an erroneous result occurs, the software routine should include an additional two times

loop to read the accessed location. If both reads are valid, then the device has completed the

write cycle, otherwise the rejection is valid.

Chip Erase

The EM39LV040 provides Chip-Erase feature, which allows the entire memory array to be

erased to logic “1” state. The Chip-Erase operation is initiated by executing a six-byte

command sequence with Chip-Erase command (10H) at address 5555H in the last byte

sequence. The Erase operation begins with the rising edge of the sixth WE# or CE#,

whichever occurs first. During the Erase operation, the only valid reads are Toggle Bit and

Data# Polling. See Table 3 for the command sequence, Figure 6 for timing diagram, and

Figure 15 for the corresponding flowchart. Any command issued during the Chip-Erase

operation is ignored.

This specification is subject to change without further notice. (07.22.2004 V1.0)

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