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CS4272 Datasheet(PDF) 25 Page - Cirrus Logic |
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CS4272 Datasheet(HTML) 25 Page - Cirrus Logic |
25 / 53 page CS4272 DS593F1 25 5.1.3.2 Clock Ratio Selection Depending on the use of an external crystal, or whether the CS4272 is in Master or Slave Mode, different MCKL/LRCK and SCLK/LRCK ratios may be used. These ratios are shown in the Tables 3 and 4 below. Table 3. Clock Ratios - Stand Alone Mode With External Crystal External Crystal Used, MCLK=Output Master Mode MCLK/LRCK SCLK/LRCK LRCK Single Speed 256 64 Fs Double Speed 128 64 Fs Quad Speed 128 64 Fs Slave Mode MCLK/LRCK SCLK/LRCK LRCK Single Speed 256 32, 64, 128 Fs Double Speed 128 32, 64 Fs Quad Speed 128 32, 64 Fs Table 4. Clock Ratios - Stand Alone Mode Without External Crystal External Crystal Not Used, MCLK=Input Master Mode MCLK/LRCK SCLK/LRCK LRCK Single Speed 256 64 Fs Double Speed 128 64 Fs Quad Speed 64 32 Fs Slave Mode MCLK/LRCK SCLK/LRCK LRCK Single Speed 256 32, 64, 128 Fs 384 32, 48, 64, 96, 128 Fs 512 32, 64, 128 Fs Double Speed 128 32, 64 Fs 192 32, 48, 64 Fs 256 32, 64 Fs Quad Speed 64 32 Fs 96 48 Fs 128 32, 64 Fs |
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