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MSM7540 Datasheet(PDF) 8 Page - OKI electronic componets |
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MSM7540 Datasheet(HTML) 8 Page - OKI electronic componets |
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8 / 16 page  8/16 MSM7540/7560 ¡ Semiconductor FEDL7540-03 ABSOLUTE MAXIMUM RATINGS Parameter Power Supply Voltage Analog Input Voltage Digital Input Voltage Storage Temperature Symbol VDD VAIN VDIN TSTG Condition — — — — Rating –0.3 to +7 –0.3 to VDD + 0.3 –0.3 to VDD + 0.3 –55 to +150 Unit V V V °C RECOMMENDED OPERATING CONDITIONS Parameter Symbol Condition Min. Typ. Max. Unit Power Supply Voltage VDD Voltage must be fixed 4.5 — 5.5 V MCK, XSYNC, RSYNC, PCMRI, PCMSI, BCLKA, BCLKB, IR, LPS, PDN, RES Input High Voltage VIH 2.2 — VDD V MCK, XSYNC, RSYNC, PCMRI, PCMSI, BCLKA, BCLKB, IR, LPS, PDN, RES Input Low Voltage VIL 0 — 0.6 V Master Clock Frequency fMCK MCK –0.01% 10.368 +0.01% MHz Bit Clock Freqency fBCKA BCLKA 32 — 2048 kHz fBCKB BCLKB 64 — 2048 kHz Synchronous Signal Frequency fSYMC XSYNC, RSYNC — 8.0 — kHz Clock Duty Ratio DC MCK, BCLKA, BCLKB 30 50 70 % MCK, XSYNC, RSYNC, PCMRI, PCMSI, BCLKA, BCLKB, IR, LPS, PDN, RES Digital Input Rise Time tIr ——50 ns MCK, XSYNC, RSYNC, PCMRI, PCMSI, BCLKA, BCLKB, IR, LPS, PDN, RES Digital Input Fall Time tIf ——50 ns Transmit Sync Signal Setting Time tXS BCLKA, BCLKB to XSYNC 100 — — ns tXS XSYNC to BCLKA, BCLKB 100 — — ns Receive Sync Signal Setting Time tRS BCLKA, BCLKB to RSYNC 100 — — ns tSR RSYNC to BCLKA, BCLKB 100 — — ns Synchronous Signal Width tWS XSYNC, RSYNC 1 BCLK — 100 ms PCM, ADPCM Set-up Time tDS — 100 — — ns PCM, ADPCM Hold Time tDH — 100 — — ns Digital Output Load RDL IS (Pull-up Resistor) 500 — — W CDL — — 100 pF IS, PCMSO, PCMRO Operating Temperature Ta — –25 +25 +70 °C Bypass Capacitor for SG CSG — 10 + 0.1 — mF SG´GND |
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