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PI6C3Q991-5IJ Datasheet(PDF) 7 Page - Pericom Semiconductor Corporation |
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PI6C3Q991-5IJ Datasheet(HTML) 7 Page - Pericom Semiconductor Corporation |
7 / 10 page 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 PI6C3Q991, PI6C3Q993 3.3V Programmable Skew PLL Clock Driver SuperClock® 7 PS8449A 10/09/00 n o it p i r c s e D 2 - 1 9 9 Q 3 C 6 I P 2 - 3 9 9 Q 3 C 6 I P 5 - 1 9 9 Q 3 C 6 I P 5 - 3 9 9 Q 3 C 6 I P 1 9 9 Q 3 C 6 I P 3 9 9 Q 3 C 6 I P s ti n U l o b m y S. n i M. p y T. x a M. n i M. p y T. x a M. n i M. p y T. x a M F M O N e g n a r y c n e u q e rf O C V2 el b a T e e s2 el b a T e e s2 el b a T e e s t H W P R H G I H h t d i w e sl u p F E R ) 1 1 ( 0 . 30 . 30 . 3 s n t L W P R W O L h t d i w e sl u p F E R ) 1 1 ( 0 . 30 . 30 . 3 tU ti n u e m it w e k s el b a m m a r g o r P3 el b a T e e s3 el b a T e e s3 el b a T e e s t R P W E K S ) 1 Q x , 0 Q x ( w e k s ri a p - d e h c t a m t u p t u o o r e Z ) 3 , 2 , 1 ( 5 0 . 00 2 . 01 . 05 2 . 01 . 05 2 . 0 s n t 0 W E K S C ) st u p t u o ll a ( w e k s t u p t u o o r e Z L F p 0 = ) 4 , 1 ( 1 . 05 2 . 05 2 . 05 . 03 . 05 7 . 0 t 1 W E K S ) st u p t u o s s al c e m a s ,ll a f -l l a f , e si r - e si r( w e k s t u p t u O ) 5 , 1 ( 5 2 . 00 5 . 06 . 07 . 06 . 00 . 1 t 2 W E K S ) d e d i v i d - d e d i v i d , d e tr e v n i -l a n i m o n ,ll a f - e si r( w e k s t u p t u O ) 5 , 1 ( 0 3 . 02 . 15 . 02 . 10 . 15 . 1 t 3 W E K S ) st u p t u o s s al c t n e r e ff i d ,ll a f -l l a f , e si r - e si r( w e k s t u p t u O ) 5 , 1 ( 5 2 . 00 5 . 05 . 07 . 07 . 02 . 1 t 4 W E K S ) d e tr e v n i - d e d i v i d , d e d i v i d -l a n i m o n ,ll a f - e si r( w e k s t u p t u O ) 5 , 1 ( 0 5 . 00 9 . 05 . 00 . 12 . 17 . 1 t V E D w e k s e ci v e d - o t - e ci v e D ) 6 , 2 , 1 ( 5 7 . 05 2 . 15 6 . 1 t D P y al e d n o it a g a p o r p B F o t t u p n i F E R ) 8 , 1 ( 5 2 . 0 0 5 2 . 05 . 0 0 5 . 07 . 0 0 7 . 0 t V C D O % 0 5 m o rf n o it a r a v el c y c y t u d t u p t u O ) 1 ( 2 . 1 0 2 . 12 . 1 0 2 . 12 . 1 0 2 . 1 t H W P % 0 5 m o rf n o it ai v e d e m it H G I H t u p t u O ) 9 , 1 ( 0 . 25 . 20 . 3 t L W P % 0 5 m o rf n o it ai v e d e m it W O L t u p t u O ) 0 1 , 1 ( 5 . 20 . 35 . 3 t E S I R O e m it e si r t u p t u O ) 1 ( 5 1 . 00 . 18 . 15 1 . 00 . 18 . 15 1 . 05 . 15 . 2 t L L A F O e m it ll a f t u p t u O ) 1 ( 5 1 . 00 . 18 . 15 1 . 00 . 18 . 15 1 . 05 . 15 . 2 t K C O L e m it k c o l L L P ) 7 , 1 ( 5 . 05 . 05 . 0s m t R J r e tt ij t u p t u o el c y c - o t - el c y C ) 1 ( S M R5 20 40 4 s p k a e p - o t - k a e P0 0 20 0 20 0 2 Table9.SwitchingCharacteristicsOverOperatingRange Notes: 1. All timing tolerances apply for F NOM≥ 25MHz. Guaranteed by design and characterization, not subject to 100% production testing. 2. Skew is the time between the earliest and the latest output transition among all outputs for which the same tU delay has been selected when all are loaded with the specified load. 3. tSKEWPR is the skew between a pair of outputs (xQ0 and xQ1) when all eight outputs are selected for 0tU. 4. tSKEW0 is the skew between outputs when they are selected for 0tU. 5. Thereare3classesofoutputs:Nominal(multipleoftUdelay),Inverted(4Q0and4Q1onlywith4F0=4F1=HIGH), and Divided (3Qx and 4Qx only in Divide-by-2 or Divide-by-4 mode). 6. t DEV is the output-to-output skew between any two devices operating under the same conditions (VCC , ambient temperature,airflow,etc.) 7. tLOCK is the time that is required before synchronization is achieved. This specification is valid only after VCC is stable and within normal operating limits. This parameter is measured from the application of a new signal or frequency at REF or FB until tPD is within specified limits. 8. tPD is measured with REF input rise and fall times (from 0.8V to 2.0V) of 1.0ns. 9. Measured at 2.0V. 10. Measured at 0.8V. 11. Refer to Table12 for more detail. |
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