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PI6C3Q991-IJ Datasheet(PDF) 3 Page - Pericom Semiconductor Corporation |
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PI6C3Q991-IJ Datasheet(HTML) 3 Page - Pericom Semiconductor Corporation |
3 / 10 page 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 PI6C3Q991, PI6C3Q993 3.3V Programmable Skew PLL Clock Driver SuperClock® 3 PS8449A 10/09/00 ProgrammableSkew Output skew with respect to the REF input is adjustable to compen- sate for PCB trace delays, backplane propagation delays or to accommodaterequirementsforspecialtimingrelationshipsbetween clocked components. Skew is selectable as a multiple of a time unit tU which is of the order of a nanosecond (see Table 2). There are 9 skew configurations available for each output pair. These configu- rations are choosen by the nF1:0 control pins. In order to minimize the number of control pins, 3-level inputs (HIGH-MID-LOW) are used,theyareintendedforbutnotrestrictedtohard-wiring.Undriven 3-level inputs default to the MID level. Where programmable skew isnotarequirement,thecontrolpinscanbeleftopenforthezeroskew default setting. The Skew Selection Table (Table 3) shows how to select specific skew taps by using the nF1:0 control pins. ExternalFeedback Byprovidingexternalfeedback,thePI6C3Q99Xfamilygivesusers flexibilitywithregardtoskewadjustment.TheFBsignaliscompared with the input REF signal at the phase detector in order to drive the VCO.PhasedifferencescausetheVCOofthePLLtoadjustupwards or downwards accordingly. An internal loop filter moderates the response of the VCO to the phase detector. The loop filter transfer function has been chosen to provide minimal jitter (or frequency variation) while still providing accurate responses to input fre- quency changes. W O L = S FD I M = S FH G I H = S Fs t n e m m o C t( n o it al u cl a c ti n u g n i m i T U)F x 4 4 (/ 1 M O N )F x 6 2 (/ 1 M O N )F x 6 1 (/ 1 M O N ) F ( e g n a r y c n e u q e rf O C V M O N ) ) 2 , 1 ( z H M 5 3 o t 5 1z H M 0 6 o t 5 2z H M 5 8 o t 0 4 e g n a r t n e m t s u j d a w e k S ) 3 ( . x a M t n e m t s u j d a s n 9 0 . 9 ± ° 9 4 ± % 4 1 ± s n 3 2 . 9 ± ° 3 8 ± % 3 2 ± s n 8 3 . 9 ± ° 5 3 1 ± % 7 3 ± s e e r g e d e s a h P s n e m it el c y c f o % F , 1 el p m a x E M O N z H M 5 1 =tU s n 2 5 . 1 = F , 2 el p m a x E M O N z H M 5 2 =tU s n 1 9 . 0 =tU s n 4 5 . 1 = F , 3 el p m a x E M O N z H M 0 3 =tU s n 6 7 . 0 =tU s n 8 2 . 1 = F , 4 el p m a x E M O N z H M 0 4 =tU s n 6 9 . 0 =tU s n 6 5 . 1 = F , 5 el p m a x E M O N z H M 0 5 =tU s n 7 7 . 0 =tU s n 5 2 . 1 = F , 6 el p m a x E M O N z H M 0 8 =tU s n 8 7 . 0 = Table 2. PLL Programmable Skew Range and Resolution Table Notes: 1. The device may be operated outside recommended frequency ranges without damage, but functional operation is not guaranteed. Selecting the appropriate FS value based on input frequency range allows the PLL to operate in its sweet spot where jitter is lowest. 2. TheleveltobesetonFSisdeterminedbythenominaloperatingfrequencyoftheVCOandTimeUnitGenerator. The VCO frequency always appears at 1Q1:0, 2Q1:0, and the higher outputs when they are operated in their undivided modes. The frequency appearing at the REF and FB inputs will be the same as the VCO when the output connected to FB is undivided. The frequency of the REF and FB inputs will be 1/2 or 1/4 the VCO frequency when the part is configured for a frequency multiplication by using a divided output as the FB input. 3. Skew adjustment range assumes that a zero skew output is used for feedback. If a skewed Q output is used for feedback, then adjustment range will be greater. For example if a 4tU skewed output is used for feedback, all other outputs will be skewed 4tU in addition to whatever skew value is programmed for those outputs. Max adjustment range applies to output pairs 3 and 4 where ±6 tU skew adjustment is possible and at the lowest FNOM value. |
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