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MSM65352 Datasheet(PDF) 7 Page - OKI electronic componets |
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MSM65352 Datasheet(HTML) 7 Page - OKI electronic componets |
7 / 15 page 7/15 ¡ Semiconductor MSM65352/65352B Secondary Function Function Pin Type Description Secondary function of P0.0: Input pin for external interrupt 0. This pin can receive an input at the rising edge, falling edge, or both the rising/falling edges. External Interrupt Control I 8 Secondary function of P0.4: Input pin for external interrupt 1. This pin can receive input at the rising edge, falling edge or both the rising/falling edges. Also used as a gate signal input pin to enable or disable the count of timer 0. I 4 Secondary function of P0.1: Hardware stop mode input pin. When this pin is set to the "L" level while the HSTP bit in SBYCON is set to "1", the hardware stop mode is entered. In the hardware stop mode, oscillation on the OSC side is stopped for low power consumption. I 7 5 Secondary function of P0.3: External clock input pin for timer 0. I Timer 0 6 Secondary function of P0.2: Output pin that provides waveform with twice the cycle of the overflow of timer 1. O Timer 1 Secondary function of P3.0 to 3.7: These are used for analog channels during A/D conversion. I A/D Converter 16 23 to 3 Secondary function of P0.5: Output pin that provides clocks equal to OSCCLK divided by 2 or 4, and also clocks equal to XTCLK divided by 2 or 4. O Clock Output 59 Secondary function of P1.4: Input pin for remote control. I Remote Control Input 56 Secondary function of P1.7: Data output pin for shift register 1. O 57 Secondary function of P1.6: Data input pin for shift register 1. I 58 Secondary function of P1.5: Sync clock I/O pin for shift register 1. This provides clock output when used as the master, while it functions as clock input when used as a slave. I/O Shift Register Symbol INT0 INT1 HSTOP T0CK T1OUT AI7 AI0 to CLKOUT RMCIN SFTO1 SFTI1 SFTCK1 |
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