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TPS3514N Datasheet(PDF) 4 Page - Texas Instruments |
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TPS3514N Datasheet(HTML) 4 Page - Texas Instruments |
4 / 16 page TPS3514 SLVS422A – JULY 2003 www.ti.com 4 PIN CONFIGURATION Top View SO, DIP PIN ASSIGNMENTS PIN NAME FUNCTION 3 FPO Inverted Fault Ptotection output. Open-drain output stage. 2 GND Ground 5 IS12 12V Over-Current Protection Input 8 IS5 5V Over-Current Protection Input 9 IS33 3.3V Over-Current Protection Input 7 NC No Internal Connection 1 PGI Power-Good Input 14 PGO Power-Good Output. Open-drain output stage. 4 PSON On/Off Control Input 6 RI OCP Reference Source 13 VDD Supply Voltage 10 VS12 12V Over-Voltage/Under-Voltage Protection Input 11 VS33 3.3V Over-Voltage/Under-Voltage Protection Input 12 VS5 5V Over-Voltage/Under-Voltage Protection Input FUNCTION TABLE PGI PSON UV CONDITION 3.3V/5V OV CONDITIONS UV CONDITION 12V OC CONDITIONS FPO(1) PGO(2) < 0.9V L No No No L L < 0.9V L No No Yes L L < 0.9V L No Yes No H L < 0.9V L No Yes Yes H L < 0.9V L Yes No No L L < 0.9V L Yes No Yes L L < 0.9V L Yes Yes No H L < 0.9V L Yes Yes Yes H L > 1.2V L No No No L H > 1.2V L No No Yes H L > 1.2V L No Yes No H L > 1.2V L No Yes Yes H L > 1.2V L Yes No No H L > 1.2V L Yes No Yes H L > 1.2V L Yes Yes No H L > 1.2V L Yes Yes Yes H L x H x x x H L x = Don’t Care. NOTES: (1) For FPO, L = Fault is not latched. H = Fault is latched. (2) For PGO, L = Fault. H = No Fault. |
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