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ADP3418KRZ-REEL1 Datasheet(PDF) 3 Page - Analog Devices |
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ADP3418KRZ-REEL1 Datasheet(HTML) 3 Page - Analog Devices |
3 / 16 page ADP3418 Rev. B | Page 3 of 16 SPECIFICATIONS1 VCC = 12 V, BST = 4 V to 26 V, TA = 0°C to 85°C, unless otherwise noted. Table 1. Parameter Symbol Conditions Min Typ Max Unit SUPPLY Supply Voltage Range VCC 4.15 13.2 V Supply Current ISYS BST = 12 V, IN = 0 V 3 6 mA OD INPUT Input Voltage High 2.6 V Input Voltage Low 0.8 V Input Current –1 +1 µA Propagation Delay Time tpdhOD See Figure 3 25 40 ns tpdlOD See Figure 3 20 40 ns PWM INPUT Input Voltage High 3.0 V Input Voltage Low 0.8 V Input Current –1 +1 µA HIGH-SIDE DRIVER Output Resistance, Sourcing Current VBST − VSW = 12 V 1.8 3.0 Ω Output Resistance, Sinking Current VBST − VSW = 12 V 1.0 2.5 Ω Transition Times trDRVH See Figure 4, VBST − VSW = 12 V, CLOAD = 3 nF 35 45 ns tfDRVH See Figure 4, VBST − VSW = 12 V, CLOAD = 3 nF 20 30 ns Propagation Delay2 tpdhDRVH See Figure 4, VBST − VSW = 12 V 40 65 ns tpdlDRVH VBST − VSW = 12 V 20 35 ns LOW-SIDE DRIVER Output Resistance, Sourcing Current 1.8 3.0 Ω Output Resistance, Sinking Current 1.0 2.5 Ω Transition Times trDRVL See Figure 4, CLOAD = 3 nF 25 35 ns tfDRVL See Figure 4, CLOAD = 3 nF 21 30 ns Propagation Delay 2 tpdhDRVL See Figure 4 30 60 ns tpdlDRVL See Figure 4 10 20 ns Timeout Delay SW = 5 V 240 ns SW = PGND 90 120 ns 1 All limits at temperature extremes are guaranteed via correlation using standard Statistical Quality Control (SQC). 2 For propagation delays, tpdh refers to the specified signal going high, and tpdl refers to it going low. |
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