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MSM56V16800DH Datasheet(PDF) 8 Page - OKI electronic componets |
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MSM56V16800DH Datasheet(HTML) 8 Page - OKI electronic componets |
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8 / 30 page  ¡ Semiconductor MSM56V16800D/DH 8/30 AC Characteristics Parameter MSM56V16800D-10 MSM56V16800D-12 MSM56V16800DH-15 Clock Cycles Time Access Time from Clock Clock "H" Pulse Time Clock "L" Pulse Time Input Setup Time Input Hold Time Output Low Impedance Time from Clock Output High Impedance Time from Clock Output Hold from Clock RAS Cycle Time RAS Precharge Time RAS Active Time Write Recovery Time Write Command Input Time from Output Refresh Time Power-down Exit Set-up Time RAS to CAS Delay Time CL = 3 CL = 2 CL = 3 CL = 1 Symbol tCC tAC tCH tCL tSI tHI tRC tRP tRAS tWR tREF tPDE tRCD tOLZ tOHZ Min. 10 15 — — 3 3 3 1 100 30 60 15 — tSI + 1 CLK 30 3 — Max. — — 9 27 — — — — — — 105 — 64 — — — 8 Min. 12 17.5 — — 3 3 3 1 115 35 70 24 — tSI + 1 CLK 35 3 — Max. — — 10 30 — — — — — — 105 — 64 — — — 10 Min. 15 15 — — 3 3 3 1 105 30 70 15 — tSI + 1 CLK 30 3 — Max. — — 9 — — — — — — — 105 — 64 — — — 8 Unit ns ns ns ns ns ns ns ns ns ns ns ns ms ns ns ns ns Note 3, 4 3, 4 lOWD Cycle RAS to RAS Bank Active Delay Time tRRD 20 — 24 — 24 — ns Input Level Transition Time tT —3 —3 —3 ns tOH 3 — 3 — 3 — ns 3 CAS to CAS Delay Time (Min.) lCCD 1 1 1 Cycle 11 1 Clock Disable Time from CKE lCKE Cycle 22 2 Data Output High Impedance Time from DQM lDOZ Cycle 00 0 Data Input Mask Time from DQM lDOD Cycle 00 0 Data Input Time from Write Command lDWD Cycle Data Output High Impedance Time from Precharge Command lROH 1 1 — Cycle 2 2 2 Cycle CL = 1 CL > 1 33 3 Active Command Input Time from Mode Register Set Command Input (Min.) lMRD Cycle Note 1, 2 CL = 2 — 9 — 14 — 9 ns 3, 4 CL = 1 30 — 35 — — — ns 22 2 |
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