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74LVCH16373ADL Datasheet(PDF) 9 Page - NXP Semiconductors |
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74LVCH16373ADL Datasheet(HTML) 9 Page - NXP Semiconductors |
9 / 17 page 2003 Dec 08 9 Philips Semiconductors Product specification 16-bit D-type transparent latch with 5 V tolerant inputs/outputs; 3-state 74LVC16373A; 74LVCH16373A AC CHARACTERISTICS GND = 0 V; tr =tf ≤ 2.5 ns; CL = 50 pF; RL = 500 Ω. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT WAVEFORMS VCC (V) Tamb = −40 to +85 °C; note1 tPHL/tPLH propagation delay Dn to Qn see Fig 6 and 10 1.2 − 12 − ns 2.7 1.5 − 4.9 ns 3.0 to 3.6 1.0 3.0(2) 4.4 ns propagation delay LE to Qn see Fig 7 and 10 1.2 − 14 − ns 2.7 1.5 − 5.3 ns 3.0 to 3.6 1.5 3.4(2) 4.8 ns tPZH/tPZL 3-state output enable time OE to Qn see Fig 8 and 10 1.2 − 18 − ns 2.7 1.5 − 5.7 ns 3.0 to 3.6 1.0 3.5(2) 4.9 ns tPHZ/tPLZ 3-state output disable time OE to Qn see Fig 8 and 10 1.2 − 11 − ns 2.7 1.5 − 6.3 ns 3.0 to 3.6 1.5 3.9(2) 5.4 ns tW LE pulse width HIGH see Fig 7 1.2 −−− ns 2.7 3.0 −− ns 3.0 to 3.6 3.0 2.0(2) − ns tsu set-up time Dn to LE see Fig 9 1.2 −−− ns 2.7 2.0 −− ns 3.0 to 3.6 2.0 1.0(2) − ns th hold time Dn to LE see Fig 9 1.2 −−− ns 2.7 0.9 −− ns 3.0 to 3.6 0.9 −1.0(2) − ns tsk(0) skew note 3 3.0 to 3.6 −− 1.0 ns |
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