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STSJ18NF3LL Datasheet(PDF) 3 Page - STMicroelectronics |
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STSJ18NF3LL Datasheet(HTML) 3 Page - STMicroelectronics |
3 / 9 page 3/9 STSJ18NF3LL Table 8: SWITCHING ON Table 9: SWITCHING OFF Table 10: SOURCE DRAIN DIODE ( • )Pulse width limited by safe operating area. (*)Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. Symbol Parameter Test Conditions Min. Typ. Max. Unit td(on) tr Turn-on Delay Time Rise Time VDD = 15 V ID = 9 A RG =4.7 Ω VGS = 4.5 V (Resistive Load, Figure 15) 18 32 ns ns Qg Qgs Qgd Total Gate Charge Gate-Source Charge Gate-Drain Charge VDD=15V ID=18A VGS=4.5V (see test circuit, Figure 16) 12.5 3.2 4.5 17 nC nC nC Symbol Parameter Test Conditions Min. Typ. Max. Unit td(off) tf Turn-off Delay Time Fall Time VDD = 15 V ID = 9 A RG =4.7Ω, VGS = 4.5 V (Resistive Load, Figure 17) 21 11 ns ns Symbol Parameter Test Conditions Min. Typ. Max. Unit ISD ISDM (•) Source-drain Current Source-drain Current (pulsed) 18 72 A A VSD (*) Forward On Voltage ISD = 18 A VGS = 0 1.2 V trr Qrr IRRM Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 18 A di/dt = 100A/µs VDD = 15 V Tj = 150°C (see test circuit, Figure 17) 23 17 1.5 ns nC A ELECTRICAL CHARACTERISTICS (continued) Figure 3: Safe Operating Area Figure 4: Thermal Impedance |
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