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SST34HF1622D-70-4E-L1SE Datasheet(PDF) 11 Page - Silicon Storage Technology, Inc |
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SST34HF1622D-70-4E-L1SE Datasheet(HTML) 11 Page - Silicon Storage Technology, Inc |
11 / 38 page Advance Information 16 Mbit Concurrent SuperFlash + 2/4/8 Mbit SRAM ComboMemory SST34HF1602C / SST34HF1622C / SST34HF1642C SST34HF1642D / SST34HF1682D / SST34HF1622S / SST34HF1642S 11 ©2004 Silicon Storage Technology, Inc. S71256-00-000 3/04 TABLE 3: PIN DESCRIPTION Symbol Pin Name Functions AMS1 to A0 Address Inputs To provide flash address, A19-A0. To provide (P)SRAM address, AMS-A0 SA SRAM x8 Address To provide additional address for x8 SRAM DQ14-DQ0 Data Inputs/Outputs To output data during Read cycles and receive input data during Write cycles. Data is internally latched during a flash Erase/Program cycle. The outputs are in tri-state when OE# is high or BES1# is high or BES2 is low and BEF# is high. DQ15/A-1 Data Input/Output and LBS Address DQ15 is used as data I/O pin when in x16 mode (CIOF = “1”) A-1 is used as the LBS address pin when in x8 mode (CIOF = “0”) BEF# Flash Memory Bank Enable To activate the Flash memory bank when BEF# is low BES1# (P)SRAM Memory Bank Enable To activate the (P)SRAM memory bank when BES1# is low BES2 (P)SRAM Memory Bank Enable To activate the (P)SRAM memory bank when BES2 is high OEF#2 Output Enable To gate the data output buffers for Flash2 only OES#2 Output Enable To gate the data output buffers for SRAM2 only WEF#2 Write Enable To control the Write operations for Flash2 only WES#2 Write Enable To control the Write operations for SRAM2 only OE# Output Enable To gate the data output buffers WE# Write Enable To control the Write operations CIOF Byte Selection for Flash When low, select Byte mode. When high, select Word mode. UBS# Upper Byte Control ((P)SRAM) To enable DQ15-DQ8 LBS# Lower Byte Control ((P)SRAM) To enable DQ7-DQ0 WP# Write Protect To protect and unprotect the top 8 KWord (4 sectors) from Erase or Program operation RST# Reset To Reset and return the device to Read mode RY/BY# Ready/Busy# To output the status of a Program or Erase Operation RY/BY# is a open drain output, so a 10K Ω- 100KΩpull-up resistor is required to allow RY/BY# to transition high indicating the device is ready to read. VSSF2 Ground Flash2 only VSSS2 Ground SRAM2 only VSS Ground VDDF Power Supply (Flash) 2.7-3.3V Power Supply to Flash only VDDS Power Supply ((P)SRAM) 2.7-3.3V Power Supply to (P)SRAM only NC No Connection Unconnected pins T3.0 1256 1. AMS = Most Significant Address AMS = A16 for SST34HF1622C/S, A17 for SST34HF1642C/D/S, and A18 for SST34HF1682D 2. LS package only |
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