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ISPPAC20 Datasheet(PDF) 11 Page - Lattice Semiconductor |
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ISPPAC20 Datasheet(HTML) 11 Page - Lattice Semiconductor |
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11 / 32 page  Specifications ispPAC20 11 Theory of Operation Introduction The ispPAC20 includes two programmable analog mac- rocells called PACblocks, each emulating a collection of operational amplifiers, resistors and capacitors. Requir- ing no external components, it flexibly implements basic analog functions such as precision filtering, summing/ differencing, gain/attenuation and integration. Each PACblock contains a summing amplifier, two differential input instrument amplifiers, and an array of feedback capacitors. The capacitors, combined with a fixed value feedback element, provide more than 120 programmable poles between 10kHz to 100kHz with an absolute accu- racy of 5.0 percent. Variable gain input instrument amplifiers make it possible to program any PACblock gain in integer steps between ±1 and ±10. More complex signal processing functions are performed by configuring both PACblocks in combination with each other to achieve a variety of circuit functions. The ispPAC20 architecture is fully differential from input to output. This effectively doubles dynamic range versus single-ended I/O. It also affords improved performance with regard to specifications such as input common mode rejection (CMR) and total harmonic distortion (THD). Differential peak-peak voltage is determined by knowing the signal extremes on both differential input or output pins. For example, if V(+) equals 4V and V(-) equals 1V, the differential voltage is defined as V(+) - V(-) = Vdiff, or 4V - 1V = +3V. Since either polarity can exist on differen- tial I/O pins, it is also possible for the opposite extreme to exist and would mean when V(+) equals 1V and V(-) equals 4V, the differential voltage is now 1V - 4V = -3V. To calculate the differential peak-peak voltage or full signal swing, the absolute difference between the two extreme Vdiff’s is calculated. Using the previous ex- amples would result in |(+3V) - (-3V)| = 6V. It can be immediately seen that true differential signals result in a doubling of usable dynamic range. For more explanation of this and other differential circuit benefits, please refer to application note AN6019. Input polarity is programmable without affecting input impedance or dynamic performance, since no internal change is made other than routing to the input amplifier. Single-ended operation is achieved by using either one input and/or one output pin, as required, and adjusting gain settings to achieve desired output levels. The ispPAC20 operates on a single 5V supply and includes an internal reference generating 2.5V. This reference is made available externally through the volt- age common-mode reference or VREFOUT pin. The output common mode voltage is always referenced to 2.5V, regardless of the input common mode level. It is possible, when desired, to use an externally supplied voltage instead of VREFOUT, however. This optional common-mode output voltage (VCM) must be provided by the user via the CMVIN input pin. The only limitation is this reference voltage must be between 1.25V and 3.25V. When an external voltage is present, an ispPAC20 must be programmed, on a per-PACblock basis, to use the external reference instead of the internal 2.5V. Configuring an ispPAC20 is accomplished using PAC-Designer, a Windows-based design environment. PAC-Designer includes an AC simulator for design veri- fication prior to programming. The user can download the design to the ispPAC20 at any time via the device’s IEEE Standard 1149.1 (JTAG) compliant serial port directly from the parallel port of a PC using an ispDOWNLOAD™ cable. Once downloaded, the circuit topology and com- ponent values are stored in non-volatile digital E2CMOS cells on the ispPAC20 without any need for external programming voltages. Architecture In all ispPAC products, individual programmable circuit functions called PACells™ are carefully combined to form larger analog macrocells or PACblocks. The isp- PAC20 has two such PACblocks that incorporate specially configured PACells to perform amplification, summation, integration and filtering. Each of the two filtering/summa- tion or “FilSum” PACblocks within ispPAC20 is comprised of three separate PACells, two input instrument amplifi- ers and an output summing amplifier (see Figure 1). The input amplifier PACells act as front-end gain stages for the FilSum PACblock and allow multiple signals to be summed together. The PACblock’s output amplifier is similar to the familiar operational amplifier except that it has true differential outputs. Also included with each output amplifier is a filter capacitor array and switchable DC feedback path element. These components in com- bination enable the filtering and integrating functions of the FilSum PACblock. |
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