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SPICE Device Model SUM110N03-03P Vishay Siliconix www.vishay.com Document Number: 70095 2 09-Jun-04 SPECIFICATIONS (TJ = 25°C UNLESS OTHERWISE NOTED) Parameter Symbol Test Conditions Simulated Data Measured Data Unit Static Gate Threshold Voltage VGS(th) VDS = VGS, ID = 250 µA 1.8 V On-State Drain Current a ID(on) VDS = 5 V, VGS = 10 V 1708 A VGS = 10 V, ID = 30 A 0.0019 0.0020 VGS = 10 V, ID = 30 A, TJ = 125°C 0.0026 Drain-Source On-State Resistance a rDS(on) VGS = 4.5 V, ID = 20 A 0.0030 0.0031 Ω Forward Voltage a VSD IF = 110 A, VGS = 0 V 0.93 1.1 V Dynamic b Input Capacitance Ciss 11410 12100 Output Capacitance Coss 811 1910 Reverse Transfer Capacitance Crss VGS = 0 V, VDS = 25 V, f = 1 MHz 498 1250 pF Total Gate Charge c Qg 194 172 Gate-Source Charge c Qgs 40 40 Gate-Drain Charge c Qgd VDS = 15 V, VGS = 10 V, ID = 110 A 40 22 nC Turn-On Delay Time c td(on) 19 20 Rise Time c tr 23 20 Turn-Off Delay Time c td(off) 50 90 Fall Time c tf VDD = 15 V, RL = 0.18 Ω ID ≅ 110 A, VGEN = 10 V, RG = 2.5 Ω 44 25 Source-Drain Reverse Recovery Time trr IF = 85 A, di/dt = 100 A/µs 31 60 ns Notes a. Pulse test; pulse width ≤ 300 µs, duty cycle ≤ 2%. b. Guaranteed by design, not subject to production testing. c. Independent of operating temperature. |
