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MBP673 Datasheet(PDF) 2 Page - Fujitsu Component Limited. |
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MBP673 Datasheet(HTML) 2 Page - Fujitsu Component Limited. |
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2 / 106 page  MB90670/675 Series 2 s FEATURES •Clock Embedded PLL clock multiplication circuit Operating clock (PLL clock) can be selected from divided-by-2 of oscillation or one to four times the oscillation (at oscillation of 4 MHz, 4 MHz to 16 MHz). Minimum instruction execution time of 62.5 ns (at oscillation of 4 MHz, four times the PLL clock, operation at Vcc of 5.0 V) • CPU addressing space of 16 Mbytes Internal addressing of 24-bit External accessing can be performed by selecting 8/16-bit bus width (external bus mode) • Instruction set optimized for controller applications Rich data types (bit, byte, word, long word) Rich addressing mode (23 types) High code efficiency Enhanced precision calculation realized by the 32-bit accumulator • Instruction set designed for high level language (C) and multi-task operations Adoption of system stack pointer Enhanced pointer indirect instructions Barrel shift instructions • Enhanced execution speed 4-byte instruction queue • Enhanced interrupt function 8 levels, 32 factors • Automatic data transmission function independent of CPU operation Extended intelligent I/O service function (EI2OS) • Low-power consumption (standby) mode Sleep mode (mode in which CPU operating clock is stopped) Timebase timer mode (mode in which other than oscillation and timebase timer are stopped) Stop mode (mode in which oscillation is stopped) CPU intermittent operation mode Hardware standby mode •Process CMOS technology • I/O port MB90670 series: Maximum of 65 ports MB90675 series: Maximum of 84 ports •Timer Timebase timer/watchdog timer: 1 channel 8/16-bit PPG timer: 8-bit × 2 channels or 16-bit × 1 channel 16-bit reload timer: 2 channels 24-bit free run timer: 1 channel • Input capture (ICU) Generates an interrupt request by latching a 24-bit free run timer counter value upon detection of an edge input to the pin. • Output compare (OCU) Generates an interrupt request and reverse the output level upon detection of a match between the 24-bit free run timer counter value and the compare setting value. •I2C interface (in MB90675 series only) • Serial I/O port for supporting Inter IC BUS (Continued) |
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