6 / 9 page
AS6WA25616
7/9/02; v.1.3
Alliance Semiconductor
P. 6 of 9
Data retention characteristics (over the operating range)
Data retention waveform
AC test loads and waveforms
Notes
1During VCC power-up, a pull-up resistor to VCC on CS is required to meet ISB specification.
2
This parameter is sampled, but not 100% tested.
3
For test conditions, see AC Test Conditions.
4tCLZ and tCHZ are specified with CL = 5pF as in Figure C. Transition is measured ±500 mV from steady-state voltage.
5
This parameter is guaranteed, but not tested.
6WE is HIGH for read cycle.
7CS and OE are LOW for read cycle.
8
Address valid prior to or coincident with CS transition LOW.
9
All read cycle timings are referenced from the last valid address to the first transitioning address.
10 CS or WE must be HIGH during address transitions. Either CS or WE asserting high terminates a write cycle.
11 All write cycle timings are referenced from the last valid address to the first transitioning address.
12 N/A.
13 1.5V data retention applies to commercial and industrial temperature range operations.
14 C = 30pF, except at high Z and low Z parameters, where C = 5pF.
Parameter
Symbol
Test conditions
Min
Max
Unit
VCC for data retention
VDR
VCC = 1.5V
CS
≥ V
CC – 0.1V or
UB = LB = > VCC – 0.1V
VIN ≥ VCC – 0.1V or
VIN ≤ 0.1V
1.5V
-
V
Data retention current
ICCDR
–10
µA
Chip deselect to data retention time
tCDR
0–
ns
Operation recovery time
tR
tRC
–ns
Parameters
VCC = 3.6V
Unit
R1
1523
Ohms
R2
1142
Ohms
RTH
476
Ohms
VTH
1.4V
Volts
VCC
CS
tR
tCDR
Data retention mode
VCC
VCC
VDR ≥ 1.5V
VIH
VIH
VDR
VCC
R1
R2
OUTPUT
30 pF
INCLUDING
JIG AND
SCOPE
(a)
VCC
R1
R2
OUTPUT
5 pF
ALL INPUT PULSES
(b)
10%
90%
10%
90%
GND
VCC Typ
< 5 ns
(c)
Thevenin equivalent:
OUTPUT
RTH
VTH
INCLUDING
JIG AND
SCOPE
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
