¡ Semiconductor

MSC1201-xx

5/20

PIN DESCRIPTIONS

Power Supply

Dimming select input. When the high level is input, daylight-mode output duty cycle

is about 100% for each grid time for PWM conversion and digital dimming mode.

When the low level is input, the dark-mode output duty cycle is determined by the

duty cycle of the PWM signal input to PWM IN and the digital dimming output duty

cycle is determined by digital dimming data.

Serial clock input. Data that is input through "DATA" pin is input and output by

synchronization with the rising edge of the serial clock.

Chip select input. Only when the high level is input to this pin, interfacing with a MCU

is available through "CLOCK" and "DATA" pins.

Therefore, 2-signal lines of "CLOCK" and "DATA" can be shared with other peripherals.

CS

CLOCK

I

I

—

INH

TEST1

Serial data output. Data is shifted out at the rising edge of the serial clock with the

delay of 64-bit time. This pin is used for cascading this LSI with other drivers such

as a LED driver.

PWM signal input.

Pin

Symbol

GND

Description

Segment output pin for VFD

Input which receives display data and digital dimming data from a MCU. Data is

shifted in at the rising edge of the shift clock.

OSC1

SEG1-30

I/O

I

O

—

Ground

O

GRID1, 2

Grid 1 and Grid 2 output pins for VFD

OSC0

RC oscillation pins. Connect a resistor between OSC1 and OSC0 pin and a capacitor

between OSC0 and GND pin.

I

O

DATA

Test signal input pin. As this pin is used for shipping test of the LSI, leave open in the

normal operation mode.

DATA

OUT

PWMIN

VK

I

I

I

I

O

Blank Display input with a built-in pull-up resistor. When set to "L", all the drivers

output "L". When display duly is not controlled by this signal, leave this pin open.

1-9

24-44

10, 11

16

15

18

20

19

23

22

14

21

13

12

17