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MC1401A Datasheet(PDF) 15 Page - List of Unclassifed Manufacturers |
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MC1401A Datasheet(HTML) 15 Page - List of Unclassifed Manufacturers |
15 / 70 page 15 IC Pin Name Pin # Description/Functionality CP Chip Pinouts CP PWMMag1 PWMMag2 PWMMag3 PWMMag4 PWMMag5 PWMMag6 8 7 2 1 66 65 PWM motor output magnitude signals (output). When the chip set is in PWM output mode these pins provide the Pulse Width Modulated magnitude signal to the motor amplifier.The PWM signals are output for each motor axis as follows: 3-Phase Brushless 2-Phase Brushless Signal Axis # Phase Signal Axis # Phase PWMMag1 1 A PWMMag1 1 A PWMMag2 1 B PWMMag2 1 B PWMMag3 1 C PWMMag3 2 A PWMMag4 2 A PWMMag4 2 B PWMMag5 2 B PWMMag6 2 C NOTE: If using the MC1231A with one axis in 3-phase and the other axis in 2-phase mode, to avoid pin conflict, axis 1 should be assigned to 2-phase output, and axis 2 to 3-phase The PWM resolution is 10 bits, frequency = 24.5Kz. CP PosLimit1 PosLimit2 52 45 Positive limit switch input for axis 1-2. These signals provide directional limit inputs for the positive-side travel limit of the axis. Upon powerup these signals default to "active high" interpretation, but the interpretation can be set explicitly using the SET_LMT_SENSE command. (See Host Command Section for more info.) If not used these signals should be tied low for the default interpretation, or tied high if the interpretation is reversed. NOTE: For MC1231A both pins are valid. For MC1131A pins for axes 1 only are valid. Invalid axis pins can be left un connected. CP NegLimit1 NegLimit2 51 44 Negative limit switch input for axis 1-2. These signals provide directional limit inputs for the negative-side travel limit of the axis. Upon powerup these signals default to "active high" interpretation, but the interpretation can be set explicitly using the SET_LMT_SENSE command. (See Host Command Section for more info.) If not used these signals should be tied low for the default interpretation, or tied high if the interpretation is reversed. NOTE: For MC1231A both pins are valid. For MC1131A pins for axis 1 only are valid. Invalid axis pins can be left un connected. CP DAC16Addr0 DAC16Addr1 30 29 Axis Address used during 16-bit DAC motor command output (output). These signals encode the motor output axis address as shown in the table below (both 3-phase and 2-phase waveforms) Dac16Addr1 Dac16Addr0 Addressed Encoder Low Low Axis 1 phase A Low High Axis 1 phase B High Low Axis 2 phase A High High Axis 2 phase B Note: When connecting to 3-phase brushless motors only two of the three required phase outputs are provided in the DAC output mode. The third phase (phase C) is constructed external to the chipset, usually by the amplifier. See theory of operations for more information. To write a valid DAC motor command value DACSlct (I/O chip) and I/OAddr0-3 (CP chip) must be high, and I/OWrite (CP chip) must be low. The 16 bit DAC data word is organized as follows: High twelve bits are in Data0-11 (CP chip), and low 4 bits are in DACLow0-3 (CP chip). CP ClkIn 24 Clock In (input). This pin provides the chip set master clock (Fclk = 25.0 Mhz) |
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