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UCC384DPTR-12 Datasheet(PDF) 6 Page - Texas Instruments |
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UCC384DPTR-12 Datasheet(HTML) 6 Page - Texas Instruments |
6 / 10 page UCC284–5, UCC284–12, UCC284–ADJ, UCC384–5, UCC384–12, UCC384–ADJ LOW-DROPOUT 0.5-A NEGATIVE LINEAR REGULATOR SLUS234D – JANUARY 2000 – REVISED FEBRUARY 2002 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 APPLICATION INFORMATION programming the output voltage on the UCC384 (continued) UDG–99029 5 4 1 3 2 R1 R2 VOUT VOUTS GND 6 7 VIN VIN VIN VIN CIN VIN 8 CT SD/CT COUT VOUT + + (+) (–) (+) (–) C1 UCC384–ADJ 1 µF 4.7 µF 0.015 µF Figure 1. Typical Application Circuit For the UCC384–ADJ, the output voltage is programmed by the following equation: VOUT +* 1.25 1 ) R1 R2 (1) When R1 or R2 are selected to be greater than about 100 k Ω, a small ceramic capacitor should be placed across R1 to cancel the input pole created by R1 and the parasitic capacitance appearing on VOUTS. Values of approximately 20 pF should be adequate. dropout performance The UCC384 is tailored for low-dropout applications where low-quiescent power is important. Fabricated with a BCDMOS technology ideally suited for low input-to-output differential applications, the UCC384 passes 0.5 A while requiring only 0.2 V of headroom. The dropout voltage is dependent on operating conditions such as load current, input and load voltages, and temperature. The UCC384 achieves a low RDS(on) through the use of an internal charge-pump that drives the MOSFET gate. Figure 2 shows typical dropout voltages versus output voltage for the UCC384-5 V and -12 V versions as well as the UCC384–ADJ version programmed between –3.3 V and –15 V. Since the dropout voltage is also affected by output current, Figure 3 shows typical dropout voltages versus load current for different values of VOUT. Operating temperatures also affect the RDS(on) and the dropout voltage of the UCC384. Figure 4 shows typical dropout voltages for the UCC384 over temperature under a full load of 0.5 A. short-circuit protection The UCC384 provides unique short-circuit protection circuitry that reduces power dissipation during a fault. When an overcurrent condition is detected, the device enters a pulsed mode of operation, limiting the output to a 2.5% duty cycle. This reduces the heat sink requirements during a fault. The operation of the UCC384 during an overcurrent condition is shown in Figure 5. |
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