EDE5104AESK datasheet(7/65 Pages) ELPIDA

Part #	EDE5104AESK

Description	512M bits DDR2 SDRAM

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Manufacturer	ELPIDA [Elpida Memory]

Direct Link	http://www.elpida.com/en

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EDE5104AESK, EDE5108AESK

Data Sheet E0562E50 (Ver. 5.0)

7

DC Characteristics 1 (TC = 0

°C to +85°C, VDD, VDDQ = 1.8V ± 0.1V)

max.

Parameter

Symbol

Grade

× 4

× 8

Unit

Test condition

-6E

110

115

-5C

105

110

Operating current

(ACT-PRE)

IDD0

-4A

90

95

mA

one bank; tCK = tCK (IDD), tRC = tRC (IDD),

tRAS = tRAS min.(IDD);

CKE is H, /CS is H between valid commands;

Address bus inputs are SWITCHING;

Data bus inputs are SWITCHING

-6E

125

130

-5C

120

125

Operating current

(ACT-READ-PRE)

IDD1

-4A

105

110

mA

one bank; IOUT = 0mA;

BL = 4, CL = CL(IDD), AL = 0;

tCK = tCK (IDD), tRC = tRC (IDD),

tRAS = tRAS min.(IDD); tRCD = tRCD (IDD);

CKE is H, /CS is H between valid commands;

Address bus inputs are SWITCHING;

Data pattern is same as IDD4W

-6E

10

-5C

10

Precharge power-

down standby current

IDD2P

-4A

8

mA

all banks idle;

tCK = tCK (IDD);

CKE is L;

Other control and address bus inputs are STABLE;

Data bus inputs are FLOATING

-6E

25

-5C

25

Precharge quiet

standby current

IDD2Q

-4A

20

mA

all banks idle;

tCK = tCK (IDD);

CKE is H, /CS is H;

Other control and address bus inputs are STABLE;

Data bus inputs are FLOATING

-6E

35

-5C

30

Idle standby current

IDD2N

-4A

25

mA

all banks idle;

tCK = tCK (IDD);

CKE is H, /CS is H;

Other control and address bus inputs are SWITCHING;

Data bus inputs are SWITCHING

-6E

40

-5C

40

IDD3P-F

-4A

35

mA

Fast PDN Exit

MRS(12) = 0

-6E

25

-5C

25

Active power-down

standby current

IDD3P-S

-4A

20

mA

all banks open;

tCK = tCK (IDD);

CKE is L;

Other control and

address bus inputs

are STABLE;

Data bus inputs are

FLOATING

Slow PDN Exit

MRS(12) = 1

-6E

70

-5C

65

Active standby

current

IDD3N

-4A

60

mA

all banks open;

tCK = tCK (IDD), tRAS = tRAS max.(IDD),

tRP = tRP (IDD);

CKE is H, /CS is H between valid commands;

Other control and address bus inputs are SWITCHING;

Data bus inputs are SWITCHING

-6E

200

230

-5C

170

190

Operating current

(Burst read operating)

IDD4R

-4A

140

150

mA

all banks open, continuous burst reads, IOUT = 0mA;

BL = 4, CL = CL(IDD), AL = 0;

tCK = tCK (IDD),

tRAS = tRAS max.(IDD), tRP = tRP (IDD);

CKE is H, /CS is H between valid commands;

Address bus inputs are SWITCHING;

Data pattern is same as IDD4W

-6E

190

220

-5C

170

190

Operating current

(Burst write

operating)

IDD4W

-4A

140

150

mA

all banks open, continuous burst writes;

BL = 4, CL = CL(IDD), AL = 0;

tCK = tCK (IDD),

tRAS = tRAS max.(IDD), tRP = tRP (IDD);

CKE is H, /CS is H between valid commands;

Address bus inputs are SWITCHING;

Data bus inputs are SWITCHING

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EDE5104AESK Datasheet(PDF) 7 Page - Elpida Memory

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