VITESSE

SEMICONDUCTOR CORPORATION

Advance Product Information

Deserializer/Reclocker at 1.485Gb/s

SMPTE-292M Serializer, Deserializer, and

VSC6511

Page 8

© VITESSE SEMICONDUCTOR CORPORATION

741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896

4/10/00

G52311-0, Rev 2.0

Functional Description: Serializer Mode

The following functional blocks are used in the Serializer mode of operation. Please refer to the Functional

Description at the beginning of this document for the a description of each of these blocks.

Clock Multiplier Unit (CMU)

CRC Generator

Scrambler and NRZI Encoder

Serializer

Cable Driver Outputs

Table 3: Transmit AC Characteristics (Serializer Mode)

Figure 4: Transmit Timing Waveforms (Serializer mode)

Parameters

Description

Min

Max

Units

Conditions

D[0:19] Setup time to the

rising edge of REFCLK

2.0

—ns.

Measured from the valid data

level of D[0:19] to the crossing

of REFCLK

D[0:19] hold time after the

rising edge of REFCLK

1.5

—

ns.

SDO0, SDO1 rise/fall time

150

270

ps.

20% to 80%, 75 Ohm load to

Vdd, Tested on a sample basis

SDO0/SDO1 output jitter

—0.20

UI

Data Valid

D[19:0]

REFCLK

Data Valid

Data Valid