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DS3170L Datasheet(PDF) 11 Page - Maxim Integrated Products |
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DS3170L Datasheet(HTML) 11 Page - Maxim Integrated Products |
11 / 233 page DS3170 DS3/E3 Single-Chip Transceiver 11 of 233 Table 11-19. FEAC Receive Side Register Map ..................................................................................................... 165 Table 11-20. Transmit Side Trail Trace Register Map............................................................................................. 168 Table 11-21. Trail Trace Receive Side Register Map.............................................................................................. 169 Table 11-22. Transmit DS3 Framer Register Map .................................................................................................. 174 Table 11-23. Receive DS3 Framer Register Map ................................................................................................... 176 Table 11-24. Transmit G.751 E3 Framer Register Map .......................................................................................... 183 Table 11-25. Receive G.751 E3 Framer Register Map ........................................................................................... 186 Table 11-26. Transmit G.832 E3 Framer Register Map .......................................................................................... 191 Table 11-27. Receive G.832 E3 Framer Register Map ........................................................................................... 194 Table 12-1. JTAG Instruction Codes ....................................................................................................................... 205 Table 12-2. JTAG ID Codes .................................................................................................................................... 206 Table 13-1. DS3170 Pin Assignments for 100-Pin LQFP (Sorted by Signal Name)............................................... 208 Table 13-2. DS3170 Pin Assignments for 100-Pin LQFP (Sorted by Pin #) ........................................................... 209 Table 13-3. DS3170 Pin Assignments for 100-Ball CSBGA (Sorted by Signal Name)........................................... 210 Table 13-4. DS3170 Pin Assignments for 100-Ball CSBGA (Sorted by Ball #) ...................................................... 211 Table 15-1. Thermal Information for 100-Pin CSBGA ............................................................................................. 215 Table 15-2. Thermal Information for 100-Pin LQFP ................................................................................................ 215 Table 16-1. Recommended DC Operating Conditions ............................................................................................ 216 Table 16-2. DC Electrical Characteristics................................................................................................................ 216 Table 16-3. Output Pin Drive ................................................................................................................................... 217 Table 17-1. Framer Interface Timing ....................................................................................................................... 220 Table 17-2. System Port Interface Timing ............................................................................................................... 220 Table 17-3. Misc Timing .......................................................................................................................................... 221 Table 17-4. Overhead Port Timing .......................................................................................................................... 221 Table 17-5. SPI Bus Mode Timing........................................................................................................................... 222 Table 17-6. Micro Interface Timing .......................................................................................................................... 224 Table 17-7. DS3 Waveform Template ..................................................................................................................... 227 Table 17-8. DS3 Waveform Test Parameters and Limits ........................................................................................ 227 Table 17-9. E3 Waveform Test Parameters and Limits........................................................................................... 228 Table 17-10. Receiver Input Characteristics—DS3 Mode....................................................................................... 230 Table 17-11. Receiver Input Characteristics—E3 Mode ......................................................................................... 230 Table 17-12. Transmitter Output Characteristics—DS3 Modes .............................................................................. 231 Table 17-13. Transmitter Output Characteristics—E3 Mode................................................................................... 231 Table 17-14. JTAG Interface Timing........................................................................................................................ 232 |
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