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AT94S10AL-25DGI Datasheet(PDF) 11 Page - ATMEL Corporation |
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AT94S10AL-25DGI Datasheet(HTML) 11 Page - ATMEL Corporation |
11 / 31 page 11 AT94S Secure Family 2314D–FPSLI–2/04 SEQUENTIAL READ: Sequential Reads follow either a Current Address Read or a Random Address Read. After the programmer receives a Data Byte, it may respond with an Acknowledge Bit. As long as the Configurator receives an Acknowledge Bit, it will continue to increment the Data Byte address and serially clock out sequential Data Bytes until the memory address limit is reached.(1) The Sequential Read instruction is terminated when the programmer does not respond with an Acknowledge Bit but instead generates a Stop Condition following the receipt of a Data Byte. Note: 1. If an ACK is sent by the programmer after the data in the last memory address is sent by the configurator, the internal address counter will “rollover” to the first byte address of the memory array and continue to send data as long as an ACK is sent by the programmer. Programmer Functions The following programmer functions are supported while the Configurator is in program- ming mode (i.e., when SER_EN is driven Low): 1. Read the Manufacturer’s Code and the Device Code (optional for ISP). 2. Program the device. 3. Verify the device. In the order given above, they are performed in the following manner. Reading Manufacturer’s and Device Codes On AT17LV010 Configurator, the sequential reading of these bytes are accomplished by performing a Random Read at EEPROM Address 040000H. The correct codes are: Manufacturers Code -Byte 0 1E Device Code - Byte 1 F7 AT17LV010 Note: The Manufacturer’s Code and Device Code are read using the byte ordering specified for Data Bytes; i.e., LSB first, MSB last. Programming the Device All the bytes in a given page must be written. The page access order is not important but it is suggested that the Configurator be written sequentially from address 0. Writing is accomplished by using the cSDA and cSCK pins. Important Note on AT94S Series Configurators Programming The first byte of data will not be cached for read back during FPGA Configuration (i.e., when SER_EN is driven High) until the Configurator is power-cycled. Verifying the Device All bytes in the Configurator should be read and compared to their intended values. Reading is done using the cSDA and cSCK pins. In-System Programming Applications The AT94S Series Configurators are in-system (re)programmable (ISP). The example shown on the following page supports the following programmer functions: 1. Read the Manufacturer’s Code and the Device Code. 2. Program the device. 3. Verify the device data. While Atmel’s Secure FPSLIC Configurators can be programmed from various sources (e.g., on-board microcontrollers or PLDs), the applications shown here are designed to facilitate users of our ATDH2225 Configurator Programming Cable. The typical system setup is shown in Figure 3. The pages within the configuration EEPROM can be selectively rewritten. This document is limited to example implementations for Atmel’s AT94S application. |
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