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ATA6405 Datasheet(PDF) 7 Page - ATMEL Corporation |
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ATA6405 Datasheet(HTML) 7 Page - ATMEL Corporation |
7 / 12 page 7 ATA6405 [Preliminary] 4737B–AUTO–08/04 Detailed Description of the Watchdog Function Figure 2. Watchdog Sequence WD sequence (typically): t 1 = 8.0 ms t 2 = 6.4 ms After completion of the reset function (low/high slope on NRES) a lead time t d follows (e.g. for setups) of typically 40 µs before the actual watchdog sequence begins. Times t 1 and t 2 form a part of the watchdog sequence and assume a fixed relationship to one another. A triggering signal from the microcontroller is anticipated within the timeframe of t 2 (6.4 ms). Of decisive importance in this case is the low/high slope after the mini- mum dwell time t trig of typically 40 µs. This slope serves to restart the watchdog sequence. Should the triggering signal fail to emerge, the NRES output will be drawn on ground potential applying the time duration t res of typically 10 ms. A reset situation is likewise unleashed if the triggering signal emerges within the timeframe of t 1 (8 ms) or alternatively if t trig exceeds the time of 100 µs. An example of how the above time values are defined is given in the first variant. How- ever, the time values can, on principle, be selected by the mask function. A 6-bit counter is available for t trig and a 16-bit counter for td, t1, t2, tres. In the same way, orientation of the trigger pulse (low- or high-active) is selectable by the mask function. The original time basis is defaulted by the internal oscillator. The time basis T wd for the watchdog is obtained by applying a division ratio of 1:4. All the times indicated above are multiples of T wd. Oscillator cycle duration: T osc = 1/fosc = 1/400 kHz ±Tol. = 2.50 µs ±Tol. Time basis for watchdog: T wd = 4 x Tosc = 10 µs (typical) The above time values and oscillator tolerances result in a typical triggering frequency based on T = 10.56 ms ±0.94 ms. NRES NTRIG t d t 1 t 2 t 1 t 2 t res t d t trig |
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