5

FN8214.1

October 25, 2005

D/A CONVERTER CHARACTERISTICS (See pg. 4 for Standard Conditions)

Notes: 1.

DAC input Byte = FFh, Source or sink mode.

2.

LSB is defined as

divided by the resistance between R1 or R2 to Vss.

3.

expressed in LSB.

the output of the DAC, when the input changes by one code step. It is expressed in LSB. The measured values are adjusted for Offset

ing the measured transfer curve for Offset and Full Scale Error. It is expressed in LSB.

4.

These parameters are periodically sampled and not 100% tested.

5.

6.

age changes to 2.5V from the sourcing rail, and the current variation is <1%.

Symbol

Parameter

Min

Typ

Max

Unit

Test Conditions / Notes

IFS

I1 or I2 full scale current

1.56

1.58

1.6

mA

See note 1, 5, R = 510

Ω

3.2

mA

See note 1, 4, 6, R = 255

Ω

I1 or I2 D/A converter offset error

1

1

LSB

See notes 2 and 3.

I1 or I2 D/A converter full scale error

-2

2

LSB

I1 or I2 D/A converter

Differential Nonlinearity

-0.5

0.5

LSB

I1 or I2 D/A converter Integral Nonlin-

earity with respect to a straight line

through 0 and the full scale value

-1

1

LSB

I1 or I2 Sink Voltage Compliance

1.2

Vcc

V

See note 5

2.5

Vcc

V

See note 4, 6

I1 or I2 Source Voltage Compliance

0

Vcc-1.2

V

See note 5

0

Vcc-2.5

V

See note 4, 6

I1 or I2 overshoot on D/A Converter

data byte transition

0

µA

DAC input byte changing from

00h to FFh and vice

versa, V(I1) and V(I2) are

Vcc - 1.2V in source mode

and 1.2V in sink mode.

See note 4.

I1 or I2 undershoot on D/A Converter

data byte transition

0

µA

I1 or I2 rise time on D/A Converter data

byte transition; 10% to 90%

530

µs

Temperataure coefficient of output

current due to internal parameters

-100

+100

ppm/

°C

See Figure 7.

VRMbit = “0”

2

3

V(VRef)

255

x

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X96010